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65 lines
2.0 KiB
Diff
65 lines
2.0 KiB
Diff
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From 61e034cd7f7a66c61a791d86bb866c56067b599a Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Thu, 30 Nov 2023 12:57:03 +0000
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Subject: [PATCH 0828/1085] pinctrl: bcm2712: Fix for the first valid GPIO
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A non-zero mux bit number is used to detect a valid entry in the
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pin_regs tables, but GPIO 0 (GPIO 1 on D0) is a valid GPIO with a mux
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bit number of zero, so add a high-bit on all valid entries to
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distinguish this from an uninitialised row in the table.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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drivers/pinctrl/bcm/pinctrl-bcm2712.c | 16 ++++++++++------
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1 file changed, 10 insertions(+), 6 deletions(-)
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--- a/drivers/pinctrl/bcm/pinctrl-bcm2712.c
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+++ b/drivers/pinctrl/bcm/pinctrl-bcm2712.c
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@@ -60,22 +60,24 @@
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}, \
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}
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-#define REG_BIT_INVALID 0xffff
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+#define MUX_BIT_VALID 0x8000
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+#define REG_BIT_INVALID 0xffff
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#define BIT_TO_REG(b) (((b) >> 5) << 2)
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#define BIT_TO_SHIFT(b) ((b) & 0x1f)
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+#define MUX_BIT(mr, mb) (MUX_BIT_VALID + ((mr)*4)*8 + (mb)*4)
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#define GPIO_REGS(n, mr, mb, pr, pb) \
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- [n] = { ((mr)*4)*8 + (mb)*4, ((pr)*4)*8 + (pb)*2 }
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+ [n] = { MUX_BIT(mr, mb), ((pr)*4)*8 + (pb)*2 }
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-#define EMMC_REGS(n, r, b) \
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- [n] = { 0, ((r)*4)*8 + (b)*2 }
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+#define EMMC_REGS(n, pr, pb) \
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+ [n] = { 0, ((pr)*4)*8 + (pb)*2 }
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#define AGPIO_REGS(n, mr, mb, pr, pb) \
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- [n] = { ((mr)*4)*8 + (mb)*4, ((pr)*4)*8 + (pb)*2 }
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+ [n] = { MUX_BIT(mr, mb), ((pr)*4)*8 + (pb)*2 }
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#define SGPIO_REGS(n, mr, mb) \
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- [n+32] = { ((mr)*4)*8 + (mb)*4, REG_BIT_INVALID }
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+ [n+32] = { MUX_BIT(mr, mb), REG_BIT_INVALID }
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#define GPIO_PIN(a) PINCTRL_PIN(a, "gpio" #a)
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#define AGPIO_PIN(a) PINCTRL_PIN(a, "aon_gpio" #a)
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@@ -740,6 +742,7 @@ static enum bcm2712_funcs bcm2712_pinctr
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if (!bit)
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return func_gpio;
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+ bit &= ~MUX_BIT_VALID;
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val = bcm2712_reg_rd(pc, BIT_TO_REG(bit));
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fsel = (val >> BIT_TO_SHIFT(bit)) & BCM2712_FSEL_MASK;
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@@ -767,6 +770,7 @@ static void bcm2712_pinctrl_fsel_set(
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if (!bit || func >= func_count)
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return;
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+ bit &= ~MUX_BIT_VALID;
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fsel = BCM2712_FSEL_COUNT;
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