openwrt/target/linux/mvebu/patches-3.8/009-mmc_mvsdio_add_pinctrl.patch

On many Marvell SoCs, the pins used for the SDIO interface are part of
the MPP pins, that are muxable pins. In order to get the muxing of
those pins correct, this commit integrates the mvsdio driver with the
pinctrl infrastructure by calling devm_pinctrl_get_select_default()
during ->probe().

Note that we permit this function to fail because not all Marvell
platforms have yet been fully converted to using the pinctrl
infrastructure.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 drivers/mmc/host/mvsdio.c |    6 ++++++
 1 file changed, 6 insertions(+)

--- a/drivers/mmc/host/mvsdio.c
+++ b/drivers/mmc/host/mvsdio.c
@@ -25,6 +25,7 @@
 #include <linux/of_irq.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/slot-gpio.h>
+#include <linux/pinctrl/consumer.h>
 
 #include <asm/sizes.h>
 #include <asm/unaligned.h>
@@ -692,6 +693,7 @@ static int __init mvsd_probe(struct plat
 	struct resource *r;
 	int ret, irq;
 	int gpio_card_detect, gpio_write_protect;
+	struct pinctrl *pinctrl;
 
 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	irq = platform_get_irq(pdev, 0);
@@ -713,6 +715,10 @@ static int __init mvsd_probe(struct plat
 	host->dev = &pdev->dev;
 	host->res = r;
 
+	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+	if (IS_ERR(pinctrl))
+		dev_warn(&pdev->dev, "no pins associated\n");
+
 	/* Some non-DT platforms do not pass a clock, and the clock
 	   frequency is passed through platform_data. On DT platforms,
 	   a clock must always be passed, even if there is no gatable