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openwrt/target/linux/stm32/patches-6.6/010-ARM-dts-stm32-put-ETZPC-as-an-access-controller-for-.patch

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stm32: add new stm32 target New stm32 target introduces support for stm32mp1 based devices. For now it includes an initial support of the STM32MP135F-DK device. The specifications bellow only list supported features. Specifications -------------- SOC: STM32MP135FAF7 RAM: 512 MiB Storage: SD Card Ethernet: 2x 100 Mbps Wireless: 2.4GHz Cypress CYW43455 (802.11b/g/n) LEDs: Heartbeat (Blue) Buttons: 1x Reset, 1x User (USER2) USB: 4x 2.0 Type-A Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://github.com/openwrt/openwrt/pull/16716 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> (cherry picked from commit 851e7f77e424f24cda8531330f2d82ebc942c0a4) Link: https://github.com/openwrt/openwrt/pull/17097 Signed-off-by: Petr Štetiar <ynezz@true.cz>
2024-09-26 14:55:22 +00:00
From 21ca3d7c59595d76237faebeff4f6a979cf7ae82 Mon Sep 17 00:00:00 2001
From: Alexandre Torgue <alexandre.torgue@foss.st.com>
Date: Fri, 5 Apr 2024 13:45:24 +0200
Subject: [PATCH 2/5] ARM: dts: stm32: put ETZPC as an access controller for
STM32MP13x boards
Reference ETZPC as an access-control-provider.
For more information on which peripheral is securable or supports MCU
isolation, please read the STM32MP13 reference manual
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp131.dtsi | 28 ++++++++++++++++++++++++++-
arch/arm/boot/dts/st/stm32mp133.dtsi | 1 +
arch/arm/boot/dts/st/stm32mp13xc.dtsi | 1 +
arch/arm/boot/dts/st/stm32mp13xf.dtsi | 1 +
4 files changed, 30 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -886,10 +886,11 @@
};
etzpc: bus@5c007000 {
- compatible = "simple-bus";
+ compatible = "st,stm32-etzpc", "simple-bus";
reg = <0x5c007000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
+ #access-controller-cells = <1>;
ranges;
adc_2: adc@48004000 {
@@ -902,6 +903,7 @@
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ access-controllers = <&etzpc 33>;
status = "disabled";
adc2: adc@0 {
@@ -949,6 +951,7 @@
dr_mode = "otg";
otg-rev = <0x200>;
usb33d-supply = <&scmi_usb33>;
+ access-controllers = <&etzpc 34>;
status = "disabled";
};
@@ -962,6 +965,7 @@
dmas = <&dmamux1 41 0x400 0x5>,
<&dmamux1 42 0x400 0x1>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 16>;
status = "disabled";
};
@@ -975,6 +979,7 @@
dmas = <&dmamux1 43 0x400 0x5>,
<&dmamux1 44 0x400 0x1>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 17>;
status = "disabled";
};
@@ -986,6 +991,7 @@
dmas = <&dmamux1 83 0x400 0x01>,
<&dmamux1 84 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 13>;
status = "disabled";
};
@@ -1000,6 +1006,7 @@
dmas = <&dmamux1 83 0x400 0x01>,
<&dmamux1 84 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 18>;
status = "disabled";
};
@@ -1014,6 +1021,7 @@
dmas = <&dmamux1 85 0x400 0x01>,
<&dmamux1 86 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 19>;
status = "disabled";
};
@@ -1032,6 +1040,7 @@
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x4>;
i2c-analog-filter;
+ access-controllers = <&etzpc 20>;
status = "disabled";
};
@@ -1050,6 +1059,7 @@
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x8>;
i2c-analog-filter;
+ access-controllers = <&etzpc 21>;
status = "disabled";
};
@@ -1068,6 +1078,7 @@
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x10>;
i2c-analog-filter;
+ access-controllers = <&etzpc 22>;
status = "disabled";
};
@@ -1080,6 +1091,7 @@
interrupt-names = "global";
clocks = <&rcc TIM12_K>;
clock-names = "int";
+ access-controllers = <&etzpc 23>;
status = "disabled";
pwm {
@@ -1104,6 +1116,7 @@
interrupt-names = "global";
clocks = <&rcc TIM13_K>;
clock-names = "int";
+ access-controllers = <&etzpc 24>;
status = "disabled";
pwm {
@@ -1128,6 +1141,7 @@
interrupt-names = "global";
clocks = <&rcc TIM14_K>;
clock-names = "int";
+ access-controllers = <&etzpc 25>;
status = "disabled";
pwm {
@@ -1157,6 +1171,7 @@
<&dmamux1 107 0x400 0x1>,
<&dmamux1 108 0x400 0x1>;
dma-names = "ch1", "up", "trig", "com";
+ access-controllers = <&etzpc 26>;
status = "disabled";
pwm {
@@ -1184,6 +1199,7 @@
dmas = <&dmamux1 109 0x400 0x1>,
<&dmamux1 110 0x400 0x1>;
dma-names = "ch1", "up";
+ access-controllers = <&etzpc 27>;
status = "disabled";
pwm {
@@ -1211,6 +1227,7 @@
dmas = <&dmamux1 111 0x400 0x1>,
<&dmamux1 112 0x400 0x1>;
dma-names = "ch1", "up";
+ access-controllers = <&etzpc 28>;
status = "disabled";
pwm {
@@ -1235,6 +1252,7 @@
clocks = <&rcc LPTIM2_K>;
clock-names = "mux";
wakeup-source;
+ access-controllers = <&etzpc 1>;
status = "disabled";
pwm {
@@ -1269,6 +1287,7 @@
clocks = <&rcc LPTIM3_K>;
clock-names = "mux";
wakeup-source;
+ access-controllers = <&etzpc 2>;
status = "disabled";
pwm {
@@ -1297,6 +1316,7 @@
resets = <&rcc HASH1_R>;
dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>;
dma-names = "in";
+ access-controllers = <&etzpc 41>;
status = "disabled";
};
@@ -1305,6 +1325,7 @@
reg = <0x54004000 0x400>;
clocks = <&rcc RNG1_K>;
resets = <&rcc RNG1_R>;
+ access-controllers = <&etzpc 40>;
status = "disabled";
};
@@ -1320,6 +1341,7 @@
#size-cells = <1>;
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
+ access-controllers = <&etzpc 54>;
status = "disabled";
nand-controller@4,0 {
@@ -1353,6 +1375,7 @@
dma-names = "tx", "rx";
clocks = <&rcc QSPI_K>;
resets = <&rcc QSPI_R>;
+ access-controllers = <&etzpc 55>;
status = "disabled";
};
@@ -1367,6 +1390,7 @@
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <130000000>;
+ access-controllers = <&etzpc 50>;
status = "disabled";
};
@@ -1381,6 +1405,7 @@
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <130000000>;
+ access-controllers = <&etzpc 51>;
status = "disabled";
};
@@ -1394,6 +1419,7 @@
resets = <&rcc USBPHY_R>;
vdda1v1-supply = <&scmi_reg11>;
vdda1v8-supply = <&scmi_reg18>;
+ access-controllers = <&etzpc 5>;
status = "disabled";
usbphyc_port0: usb-phy@0 {
--- a/arch/arm/boot/dts/st/stm32mp133.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
@@ -47,6 +47,7 @@
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ access-controllers = <&etzpc 32>;
status = "disabled";
adc1: adc@0 {
--- a/arch/arm/boot/dts/st/stm32mp13xc.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13xc.dtsi
@@ -11,6 +11,7 @@
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CRYP1>;
resets = <&rcc CRYP1_R>;
+ access-controllers = <&etzpc 42>;
status = "disabled";
};
};
--- a/arch/arm/boot/dts/st/stm32mp13xf.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13xf.dtsi
@@ -11,6 +11,7 @@
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CRYP1>;
resets = <&rcc CRYP1_R>;
+ access-controllers = <&etzpc 42>;
status = "disabled";
};
};
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