mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-30 18:47:06 +00:00
84 lines
2.9 KiB
Diff
84 lines
2.9 KiB
Diff
|
From 0476213f50452446fedd1a918b7bc72eb39a4c46 Mon Sep 17 00:00:00 2001
|
||
|
From: Marek Vasut <marex@denx.de>
|
||
|
Date: Tue, 11 Jun 2024 10:36:03 +0200
|
||
|
Subject: [PATCH 6/8] net: stmmac: dwmac-stm32: Clean up the debug prints
|
||
|
|
||
|
Use dev_err()/dev_dbg() and phy_modes() to print PHY mode instead of
|
||
|
pr_debug() and hand-written PHY mode decoding. This way, each debug
|
||
|
print has associated device with it and duplicated mode decoding is
|
||
|
removed.
|
||
|
|
||
|
Signed-off-by: Marek Vasut <marex@denx.de>
|
||
|
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
|
||
|
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
||
|
---
|
||
|
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 18 ++++++++----------
|
||
|
1 file changed, 8 insertions(+), 10 deletions(-)
|
||
|
|
||
|
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
|
||
|
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
|
||
|
@@ -228,19 +228,16 @@ static int stm32mp1_configure_pmcr(struc
|
||
|
switch (plat_dat->mac_interface) {
|
||
|
case PHY_INTERFACE_MODE_MII:
|
||
|
val = SYSCFG_PMCR_ETH_SEL_MII;
|
||
|
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
|
||
|
break;
|
||
|
case PHY_INTERFACE_MODE_GMII:
|
||
|
val = SYSCFG_PMCR_ETH_SEL_GMII;
|
||
|
if (dwmac->enable_eth_ck)
|
||
|
val |= SYSCFG_PMCR_ETH_CLK_SEL;
|
||
|
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_GMII\n");
|
||
|
break;
|
||
|
case PHY_INTERFACE_MODE_RMII:
|
||
|
val = SYSCFG_PMCR_ETH_SEL_RMII;
|
||
|
if (dwmac->enable_eth_ck)
|
||
|
val |= SYSCFG_PMCR_ETH_REF_CLK_SEL;
|
||
|
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RMII\n");
|
||
|
break;
|
||
|
case PHY_INTERFACE_MODE_RGMII:
|
||
|
case PHY_INTERFACE_MODE_RGMII_ID:
|
||
|
@@ -249,15 +246,16 @@ static int stm32mp1_configure_pmcr(struc
|
||
|
val = SYSCFG_PMCR_ETH_SEL_RGMII;
|
||
|
if (dwmac->enable_eth_ck)
|
||
|
val |= SYSCFG_PMCR_ETH_CLK_SEL;
|
||
|
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RGMII\n");
|
||
|
break;
|
||
|
default:
|
||
|
- pr_debug("SYSCFG init : Do not manage %d interface\n",
|
||
|
- plat_dat->mac_interface);
|
||
|
+ dev_err(dwmac->dev, "Mode %s not supported",
|
||
|
+ phy_modes(plat_dat->mac_interface));
|
||
|
/* Do not manage others interfaces */
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
+ dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
|
||
|
+
|
||
|
/* Need to update PMCCLRR (clear register) */
|
||
|
regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
|
||
|
dwmac->ops->syscfg_eth_mask);
|
||
|
@@ -291,19 +289,19 @@ static int stm32mcu_set_mode(struct plat
|
||
|
switch (plat_dat->mac_interface) {
|
||
|
case PHY_INTERFACE_MODE_MII:
|
||
|
val = SYSCFG_MCU_ETH_SEL_MII;
|
||
|
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
|
||
|
break;
|
||
|
case PHY_INTERFACE_MODE_RMII:
|
||
|
val = SYSCFG_MCU_ETH_SEL_RMII;
|
||
|
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RMII\n");
|
||
|
break;
|
||
|
default:
|
||
|
- pr_debug("SYSCFG init : Do not manage %d interface\n",
|
||
|
- plat_dat->mac_interface);
|
||
|
+ dev_err(dwmac->dev, "Mode %s not supported",
|
||
|
+ phy_modes(plat_dat->mac_interface));
|
||
|
/* Do not manage others interfaces */
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
+ dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
|
||
|
+
|
||
|
return regmap_update_bits(dwmac->regmap, reg,
|
||
|
dwmac->ops->syscfg_eth_mask, val << 23);
|
||
|
}
|