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79 lines
2.5 KiB
Diff
79 lines
2.5 KiB
Diff
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From 160cee9f3b24ef830fdf3abbe56f4de94eeea812 Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Fri, 21 Apr 2023 20:23:42 +0100
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Subject: [PATCH] bcm2835-dma: Fix dma_abort for 40-bit channels
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It wasn't aborting the transfer and caused stop/start
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of hdmi audio dma to be unreliable.
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New sequence approved by Broadcom.
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/dma/bcm2835-dma.c | 42 ++++++++++++++++++++++++++-------------
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1 file changed, 28 insertions(+), 14 deletions(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -651,10 +651,6 @@ static void bcm2835_dma_abort(struct bcm
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{
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void __iomem *chan_base = c->chan_base;
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long int timeout = 10000;
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- u32 wait_mask = BCM2835_DMA_WAITING_FOR_WRITES;
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-
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- if (c->is_40bit_channel)
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- wait_mask = BCM2711_DMA40_WAITING_FOR_WRITES;
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/*
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* A zero control block address means the channel is idle.
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@@ -663,19 +659,37 @@ static void bcm2835_dma_abort(struct bcm
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if (!readl(chan_base + BCM2835_DMA_ADDR))
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return;
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- /* Write 0 to the active bit - Pause the DMA */
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- writel(0, chan_base + BCM2835_DMA_CS);
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-
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- /* Wait for any current AXI transfer to complete */
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- while ((readl(chan_base + BCM2835_DMA_CS) & wait_mask) && --timeout)
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- cpu_relax();
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-
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- /* Peripheral might be stuck and fail to signal AXI write responses */
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- if (!timeout)
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- dev_err(c->vc.chan.device->dev,
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- "failed to complete outstanding writes\n");
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+ if (c->is_40bit_channel) {
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+ /* Halt the current DMA */
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+ writel(readl(chan_base + BCM2711_DMA40_CS) | BCM2711_DMA40_HALT,
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+ chan_base + BCM2711_DMA40_CS);
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+
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+ while ((readl(chan_base + BCM2711_DMA40_CS) & BCM2711_DMA40_HALT) && --timeout)
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+ cpu_relax();
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+
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+ /* Peripheral might be stuck and fail to halt */
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+ if (!timeout)
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+ dev_err(c->vc.chan.device->dev,
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+ "failed to halt dma\n");
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+
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+ writel(0, chan_base + BCM2711_DMA40_CS);
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+ writel(0, chan_base + BCM2711_DMA40_CB);
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+ } else {
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+ /* Write 0 to the active bit - Pause the DMA */
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+ writel(0, chan_base + BCM2835_DMA_CS);
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+
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+ /* Wait for any current AXI transfer to complete */
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+ while ((readl(chan_base + BCM2835_DMA_CS) & BCM2835_DMA_WAITING_FOR_WRITES)
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+ && --timeout)
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+ cpu_relax();
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+
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+ /* Peripheral might be stuck and fail to signal AXI write responses */
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+ if (!timeout)
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+ dev_err(c->vc.chan.device->dev,
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+ "failed to complete outstanding writes\n");
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- writel(BCM2835_DMA_RESET, chan_base + BCM2835_DMA_CS);
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+ writel(BCM2835_DMA_RESET, chan_base + BCM2835_DMA_CS);
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+ }
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}
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static void bcm2835_dma_start_desc(struct bcm2835_chan *c)
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