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194 lines
5.3 KiB
Diff
194 lines
5.3 KiB
Diff
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From e2f0a5c9cbd4945f715014069b7cc7041bba787b Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Thu, 16 Feb 2023 00:29:56 +0200
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Subject: [PATCH] media: i2c: imx290: Use CSI timings as per datasheet
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Should be upstream commit 34819ba0b450
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Commit "98e0500eadb7 media: i2c: imx290: Add configurable link frequency
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and pixel rate" added support for the increased link frequencies
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on 2 data lanes, but didn't update the CSI timing registers in
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accordance with the datasheet.
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Use the specified settings.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
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Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
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---
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drivers/media/i2c/imx290.c | 126 +++++++++++++++++++++++++++++++------
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1 file changed, 106 insertions(+), 20 deletions(-)
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--- a/drivers/media/i2c/imx290.c
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+++ b/drivers/media/i2c/imx290.c
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@@ -193,6 +193,18 @@ struct imx290_mode {
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u32 data_size;
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};
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+struct imx290_csi_cfg {
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+ u16 repetition;
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+ u16 tclkpost;
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+ u16 thszero;
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+ u16 thsprepare;
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+ u16 tclktrail;
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+ u16 thstrail;
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+ u16 tclkzero;
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+ u16 tclkprepare;
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+ u16 tlpx;
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+};
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+
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struct imx290 {
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struct device *dev;
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struct clk *xclk;
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@@ -292,16 +304,6 @@ static const struct imx290_regval imx290
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{ IMX290_INCKSEL4, 0x01 },
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{ IMX290_INCKSEL5, 0x1a },
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{ IMX290_INCKSEL6, 0x1a },
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- /* data rate settings */
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- { IMX290_REPETITION, 0x10 },
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- { IMX290_TCLKPOST, 87 },
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- { IMX290_THSZERO, 55 },
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- { IMX290_THSPREPARE, 31 },
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- { IMX290_TCLKTRAIL, 31 },
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- { IMX290_THSTRAIL, 31 },
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- { IMX290_TCLKZERO, 119 },
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- { IMX290_TCLKPREPARE, 31 },
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- { IMX290_TLPX, 23 },
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};
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static const struct imx290_regval imx290_720p_settings[] = {
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@@ -317,16 +319,6 @@ static const struct imx290_regval imx290
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{ IMX290_INCKSEL4, 0x01 },
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{ IMX290_INCKSEL5, 0x1a },
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{ IMX290_INCKSEL6, 0x1a },
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- /* data rate settings */
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- { IMX290_REPETITION, 0x10 },
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- { IMX290_TCLKPOST, 79 },
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- { IMX290_THSZERO, 47 },
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- { IMX290_THSPREPARE, 23 },
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- { IMX290_TCLKTRAIL, 23 },
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- { IMX290_THSTRAIL, 23 },
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- { IMX290_TCLKZERO, 87 },
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- { IMX290_TCLKPREPARE, 23 },
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- { IMX290_TLPX, 23 },
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};
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static const struct imx290_regval imx290_10bit_settings[] = {
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@@ -347,6 +339,58 @@ static const struct imx290_regval imx290
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{ IMX290_CSI_DT_FMT, IMX290_CSI_DT_FMT_RAW12 },
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};
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+static const struct imx290_csi_cfg imx290_csi_222_75mhz = {
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+ /* 222.75MHz or 445.5Mbit/s per lane */
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+ .repetition = 0x10,
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+ .tclkpost = 87,
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+ .thszero = 55,
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+ .thsprepare = 31,
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+ .tclktrail = 31,
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+ .thstrail = 31,
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+ .tclkzero = 119,
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+ .tclkprepare = 31,
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+ .tlpx = 23,
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+};
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+
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+static const struct imx290_csi_cfg imx290_csi_445_5mhz = {
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+ /* 445.5MHz or 891Mbit/s per lane */
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+ .repetition = 0x00,
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+ .tclkpost = 119,
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+ .thszero = 103,
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+ .thsprepare = 71,
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+ .tclktrail = 55,
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+ .thstrail = 63,
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+ .tclkzero = 255,
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+ .tclkprepare = 63,
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+ .tlpx = 55,
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+};
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+
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+static const struct imx290_csi_cfg imx290_csi_148_5mhz = {
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+ /* 148.5MHz or 297Mbit/s per lane */
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+ .repetition = 0x10,
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+ .tclkpost = 79,
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+ .thszero = 47,
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+ .thsprepare = 23,
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+ .tclktrail = 23,
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+ .thstrail = 23,
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+ .tclkzero = 87,
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+ .tclkprepare = 23,
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+ .tlpx = 23,
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+};
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+
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+static const struct imx290_csi_cfg imx290_csi_297mhz = {
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+ /* 297MHz or 594Mbit/s per lane */
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+ .repetition = 0x00,
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+ .tclkpost = 103,
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+ .thszero = 87,
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+ .thsprepare = 47,
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+ .tclktrail = 39,
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+ .thstrail = 47,
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+ .tclkzero = 191,
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+ .tclkprepare = 47,
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+ .tlpx = 39,
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+};
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+
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/* supported link frequencies */
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#define FREQ_INDEX_1080P 0
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#define FREQ_INDEX_720P 1
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@@ -562,6 +606,42 @@ static int imx290_set_black_level(struct
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black_level >> (16 - bpp), err);
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}
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+static int imx290_set_csi_config(struct imx290 *imx290)
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+{
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+ const s64 *link_freqs = imx290_link_freqs_ptr(imx290);
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+ const struct imx290_csi_cfg *csi_cfg;
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+ int ret = 0;
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+
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+ switch (link_freqs[imx290->current_mode->link_freq_index]) {
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+ case 445500000:
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+ csi_cfg = &imx290_csi_445_5mhz;
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+ break;
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+ case 297000000:
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+ csi_cfg = &imx290_csi_297mhz;
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+ break;
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+ case 222750000:
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+ csi_cfg = &imx290_csi_222_75mhz;
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+ break;
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+ case 148500000:
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+ csi_cfg = &imx290_csi_148_5mhz;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ imx290_write(imx290, IMX290_REPETITION, csi_cfg->repetition, &ret);
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+ imx290_write(imx290, IMX290_TCLKPOST, csi_cfg->tclkpost, &ret);
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+ imx290_write(imx290, IMX290_THSZERO, csi_cfg->thszero, &ret);
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+ imx290_write(imx290, IMX290_THSPREPARE, csi_cfg->thsprepare, &ret);
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+ imx290_write(imx290, IMX290_TCLKTRAIL, csi_cfg->tclktrail, &ret);
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+ imx290_write(imx290, IMX290_THSTRAIL, csi_cfg->thstrail, &ret);
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+ imx290_write(imx290, IMX290_TCLKZERO, csi_cfg->tclkzero, &ret);
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+ imx290_write(imx290, IMX290_TCLKPREPARE, csi_cfg->tclkprepare, &ret);
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+ imx290_write(imx290, IMX290_TLPX, csi_cfg->tlpx, &ret);
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+
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+ return ret;
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+}
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+
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static int imx290_setup_format(struct imx290 *imx290,
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const struct v4l2_mbus_framefmt *format)
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{
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@@ -774,6 +854,12 @@ static int imx290_start_streaming(struct
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return ret;
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}
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+ ret = imx290_set_csi_config(imx290);
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+ if (ret < 0) {
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+ dev_err(imx290->dev, "Could not set csi cfg\n");
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+ return ret;
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+ }
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+
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/* Apply the register values related to current frame format */
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format = v4l2_subdev_get_pad_format(&imx290->sd, state, 0);
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ret = imx290_setup_format(imx290, format);
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