mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 10:08:59 +00:00
146 lines
4.2 KiB
Diff
146 lines
4.2 KiB
Diff
|
From 910746444313dc463396cd63024cdf54ef04ef39 Mon Sep 17 00:00:00 2001
|
||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||
|
Date: Wed, 27 Jul 2022 13:35:14 +0200
|
||
|
Subject: [PATCH 05/14] net: dsa: qca8k: move qca8k bulk read/write helper to
|
||
|
common code
|
||
|
|
||
|
The same ATU function are used by drivers based on qca8k family switch.
|
||
|
Move the bulk read/write helper to common code to declare these shared
|
||
|
ATU functions in common code.
|
||
|
These helper will be dropped when regmap correctly support bulk
|
||
|
read/write.
|
||
|
|
||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||
|
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
|
||
|
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||
|
---
|
||
|
drivers/net/dsa/qca/qca8k-8xxx.c | 39 ++----------------------------
|
||
|
drivers/net/dsa/qca/qca8k-common.c | 39 ++++++++++++++++++++++++++++++
|
||
|
drivers/net/dsa/qca/qca8k.h | 8 ++++++
|
||
|
3 files changed, 49 insertions(+), 37 deletions(-)
|
||
|
|
||
|
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
|
||
|
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
|
||
|
@@ -343,43 +343,6 @@ qca8k_regmap_update_bits_eth(struct qca8
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
-qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
|
||
|
-{
|
||
|
- int i, count = len / sizeof(u32), ret;
|
||
|
-
|
||
|
- if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len))
|
||
|
- return 0;
|
||
|
-
|
||
|
- for (i = 0; i < count; i++) {
|
||
|
- ret = regmap_read(priv->regmap, reg + (i * 4), val + i);
|
||
|
- if (ret < 0)
|
||
|
- return ret;
|
||
|
- }
|
||
|
-
|
||
|
- return 0;
|
||
|
-}
|
||
|
-
|
||
|
-static int
|
||
|
-qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
|
||
|
-{
|
||
|
- int i, count = len / sizeof(u32), ret;
|
||
|
- u32 tmp;
|
||
|
-
|
||
|
- if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len))
|
||
|
- return 0;
|
||
|
-
|
||
|
- for (i = 0; i < count; i++) {
|
||
|
- tmp = val[i];
|
||
|
-
|
||
|
- ret = regmap_write(priv->regmap, reg + (i * 4), tmp);
|
||
|
- if (ret < 0)
|
||
|
- return ret;
|
||
|
- }
|
||
|
-
|
||
|
- return 0;
|
||
|
-}
|
||
|
-
|
||
|
-static int
|
||
|
qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
|
||
|
{
|
||
|
struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
|
||
|
@@ -3096,6 +3059,8 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops,
|
||
|
|
||
|
static const struct qca8k_info_ops qca8xxx_ops = {
|
||
|
.autocast_mib = qca8k_get_ethtool_stats_eth,
|
||
|
+ .read_eth = qca8k_read_eth,
|
||
|
+ .write_eth = qca8k_write_eth,
|
||
|
};
|
||
|
|
||
|
static const struct qca8k_match_data qca8327 = {
|
||
|
--- a/drivers/net/dsa/qca/qca8k-common.c
|
||
|
+++ b/drivers/net/dsa/qca/qca8k-common.c
|
||
|
@@ -99,3 +99,42 @@ const struct regmap_access_table qca8k_r
|
||
|
.yes_ranges = qca8k_readable_ranges,
|
||
|
.n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges),
|
||
|
};
|
||
|
+
|
||
|
+/* TODO: remove these extra ops when we can support regmap bulk read/write */
|
||
|
+int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
|
||
|
+{
|
||
|
+ int i, count = len / sizeof(u32), ret;
|
||
|
+
|
||
|
+ if (priv->mgmt_master && priv->info->ops->read_eth &&
|
||
|
+ !priv->info->ops->read_eth(priv, reg, val, len))
|
||
|
+ return 0;
|
||
|
+
|
||
|
+ for (i = 0; i < count; i++) {
|
||
|
+ ret = regmap_read(priv->regmap, reg + (i * 4), val + i);
|
||
|
+ if (ret < 0)
|
||
|
+ return ret;
|
||
|
+ }
|
||
|
+
|
||
|
+ return 0;
|
||
|
+}
|
||
|
+
|
||
|
+/* TODO: remove these extra ops when we can support regmap bulk read/write */
|
||
|
+int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
|
||
|
+{
|
||
|
+ int i, count = len / sizeof(u32), ret;
|
||
|
+ u32 tmp;
|
||
|
+
|
||
|
+ if (priv->mgmt_master && priv->info->ops->write_eth &&
|
||
|
+ !priv->info->ops->write_eth(priv, reg, val, len))
|
||
|
+ return 0;
|
||
|
+
|
||
|
+ for (i = 0; i < count; i++) {
|
||
|
+ tmp = val[i];
|
||
|
+
|
||
|
+ ret = regmap_write(priv->regmap, reg + (i * 4), tmp);
|
||
|
+ if (ret < 0)
|
||
|
+ return ret;
|
||
|
+ }
|
||
|
+
|
||
|
+ return 0;
|
||
|
+}
|
||
|
--- a/drivers/net/dsa/qca/qca8k.h
|
||
|
+++ b/drivers/net/dsa/qca/qca8k.h
|
||
|
@@ -324,8 +324,13 @@ enum qca8k_mid_cmd {
|
||
|
QCA8K_MIB_CAST = 3,
|
||
|
};
|
||
|
|
||
|
+struct qca8k_priv;
|
||
|
+
|
||
|
struct qca8k_info_ops {
|
||
|
int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data);
|
||
|
+ /* TODO: remove these extra ops when we can support regmap bulk read/write */
|
||
|
+ int (*read_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
|
||
|
+ int (*write_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
|
||
|
};
|
||
|
|
||
|
struct qca8k_match_data {
|
||
|
@@ -423,4 +428,7 @@ int qca8k_read(struct qca8k_priv *priv,
|
||
|
int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val);
|
||
|
int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val);
|
||
|
|
||
|
+int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
|
||
|
+int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
|
||
|
+
|
||
|
#endif /* __QCA8K_H */
|