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31 lines
1.4 KiB
Diff
31 lines
1.4 KiB
Diff
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From fdbf35df9c091db9c46e57e9938e3f7a4f603a7c Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Thu, 14 Oct 2021 00:39:07 +0200
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Subject: dt-bindings: net: dsa: qca8k: Add SGMII clock phase properties
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Add names and descriptions of additional PORT0_PAD_CTRL properties.
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qca,sgmii-(rx|tx)clk-falling-edge are for setting the respective clock
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phase to failling edge.
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Co-developed-by: Matthew Hagan <mnhagan88@gmail.com>
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Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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Documentation/devicetree/bindings/net/dsa/qca8k.txt | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
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+++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
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@@ -37,6 +37,10 @@ A CPU port node has the following option
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managed entity. See
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Documentation/devicetree/bindings/net/fixed-link.txt
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for details.
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+- qca,sgmii-rxclk-falling-edge: Set the receive clock phase to falling edge.
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+ Mostly used in qca8327 with CPU port 0 set to
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+ sgmii.
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+- qca,sgmii-txclk-falling-edge: Set the transmit clock phase to falling edge.
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For QCA8K the 'fixed-link' sub-node supports only the following properties:
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