openwrt/target/linux/ramips/dts/mt7620n.dtsi

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ralink,mt7620n-soc";

	aliases {
		spi0 = &spi0;
		spi1 = &spi1;
		serial0 = &uartlite;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "mips,mips24KEc";
			reg = <0>;
		};
	};

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	cpuintc: cpuintc {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	palmbus: palmbus@10000000 {
		compatible = "palmbus";
		reg = <0x10000000 0x200000>;
		ranges = <0x0 0x10000000 0x1FFFFF>;

		#address-cells = <1>;
		#size-cells = <1>;

		sysc: sysc@0 {
			compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc", "syscon";
			reg = <0x0 0x100>;
		};

		timer: timer@100 {
			compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
			reg = <0x100 0x20>;

			interrupt-parent = <&intc>;
			interrupts = <1>;
		};

		watchdog: watchdog@120 {
			compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
			reg = <0x120 0x10>;

			resets = <&rstctrl 8>;
			reset-names = "wdt";

			interrupt-parent = <&intc>;
			interrupts = <1>;
		};

		intc: intc@200 {
			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
			reg = <0x200 0x100>;

			resets = <&rstctrl 19>;
			reset-names = "intc";

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpuintc>;
			interrupts = <2>;
		};

		memc: memc@300 {
			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
			reg = <0x300 0x100>;

			resets = <&rstctrl 20>;
			reset-names = "mc";

			interrupt-parent = <&intc>;
			interrupts = <3>;
		};

		gpio0: gpio@600 {
			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
			reg = <0x600 0x34>;

			resets = <&rstctrl 13>;
			reset-names = "pio";

			interrupt-parent = <&intc>;
			interrupts = <6>;

			gpio-controller;
			#gpio-cells = <2>;

			ngpios = <24>;
			ralink,gpio-base = <0>;
			ralink,register-map = [ 00 04 08 0c
						20 24 28 2c
						30 34 ];
		};

		gpio1: gpio@638 {
			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
			reg = <0x638 0x24>;

			interrupt-parent = <&intc>;
			interrupts = <6>;

			gpio-controller;
			#gpio-cells = <2>;

			ngpios = <16>;
			ralink,gpio-base = <24>;
			ralink,register-map = [ 00 04 08 0c
						10 14 18 1c
						20 24 ];

			status = "disabled";
		};

		gpio2: gpio@660 {
			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
			reg = <0x660 0x24>;

			interrupt-parent = <&intc>;
			interrupts = <6>;

			gpio-controller;
			#gpio-cells = <2>;

			ngpios = <32>;
			ralink,gpio-base = <40>;
			ralink,register-map = [ 00 04 08 0c
						10 14 18 1c
						20 24 ];

			status = "disabled";
		};

		gpio3: gpio@688 {
			compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
			reg = <0x688 0x24>;

			interrupt-parent = <&intc>;
			interrupts = <6>;

			gpio-controller;
			#gpio-cells = <2>;

			ngpios = <1>;
			ralink,gpio-base = <72>;
			ralink,register-map = [ 00 04 08 0c
						10 14 18 1c
						20 24 ];

			status = "disabled";
		};

		i2c: i2c@900 {
			compatible = "ralink,rt2880-i2c";
			reg = <0x900 0x100>;

			resets = <&rstctrl 16>;
			reset-names = "i2c";

			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";

			pinctrl-names = "default";
			pinctrl-0 = <&i2c_pins>;
		};

		spi0: spi@b00 {
			compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
			reg = <0xb00 0x40>;

			resets = <&rstctrl 18>;
			reset-names = "spi";

			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";

			pinctrl-names = "default";
			pinctrl-0 = <&spi_pins>;
		};

		spi1: spi@b40 {
			compatible = "ralink,rt2880-spi";
			reg = <0xb40 0x60>;

			resets = <&rstctrl 18>;
			reset-names = "spi";

			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";

			pinctrl-names = "default";
			pinctrl-0 = <&spi_cs1>;
		};

		uartlite: uartlite@c00 {
			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
			reg = <0xc00 0x100>;

			resets = <&rstctrl 19>;
			reset-names = "uartl";

			interrupt-parent = <&intc>;
			interrupts = <12>;

			reg-shift = <2>;

			pinctrl-names = "default";
			pinctrl-0 = <&uartlite_pins>;
		};

		systick: systick@d00 {
			compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
			reg = <0xd00 0x10>;

			resets = <&rstctrl 28>;
			reset-names = "intc";

			interrupt-parent = <&cpuintc>;
			interrupts = <7>;
		};
	};

	pinctrl: pinctrl {
		compatible = "ralink,rt2880-pinmux";
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinctrl0 {
		};

		ephy_pins: ephy {
			ephy {
				groups = "ephy";
				function = "ephy";
			};
		};

		spi_pins: spi_pins {
			spi_pins {
				groups = "spi";
				function = "spi";
			};
		};

		spi_cs1: spi1 {
			spi1 {
				groups = "spi refclk";
				function = "spi refclk";
			};
		};

		i2c_pins: i2c_pins {
			i2c_pins {
				groups = "i2c";
				function = "i2c";
			};
		};

		uartlite_pins: uartlite {
			uart {
				groups = "uartlite";
				function = "uartlite";
			};
		};
	};

	rstctrl: rstctrl {
		compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
		#reset-cells = <1>;
	};

	clkctrl: clkctrl {
		compatible = "ralink,rt2880-clock";
		#clock-cells = <1>;
	};

	usbphy: usbphy {
		compatible = "mediatek,mt7620-usbphy";
		#phy-cells = <0>;

		ralink,sysctl = <&sysc>;
		resets = <&rstctrl 22 &rstctrl 25>;
		reset-names = "host", "device";

		clocks = <&clkctrl 22 &clkctrl 25>;
		clock-names = "host", "device";
	};

	ethernet: ethernet@10100000 {
		compatible = "mediatek,mt7620-eth";
		reg = <0x10100000 0x10000>;

		#address-cells = <1>;
		#size-cells = <0>;

		interrupt-parent = <&cpuintc>;
		interrupts = <5>;

		resets = <&rstctrl 21 &rstctrl 23>;
		reset-names = "fe", "esw";

		mediatek,switch = <&gsw>;

		mdio-bus {
			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";
		};

		port@4 {
			compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
			reg = <4>;

			status = "disabled";
		};
	};

	gsw: gsw@10110000 {
		compatible = "mediatek,mt7620-gsw";
		reg = <0x10110000 0x8000>;

		resets = <&rstctrl 23>;
		reset-names = "esw";

		interrupt-parent = <&intc>;
		interrupts = <17>;
		mediatek,port4 = "ephy";
	};

	ehci: ehci@101c0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "generic-ehci";
		reg = <0x101c0000 0x1000>;

		interrupt-parent = <&intc>;
		interrupts = <18>;

		phys = <&usbphy>;
		phy-names = "usb";

		status = "disabled";

		ehci_port1: port@1 {
			reg = <1>;
			#trigger-source-cells = <0>;
		};
	};

	ohci: ohci@101c1000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "generic-ohci";
		reg = <0x101c1000 0x1000>;

		phys = <&usbphy>;
		phy-names = "usb";

		interrupt-parent = <&intc>;
		interrupts = <18>;

		status = "disabled";

		ohci_port1: port@1 {
			reg = <1>;
			#trigger-source-cells = <0>;
		};
	};

	wmac: wmac@10180000 {
		compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
		reg = <0x10180000 0x40000>;

		interrupt-parent = <&cpuintc>;
		interrupts = <6>;

		ralink,eeprom = "soc_wmac.eeprom";
	};
};