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66 lines
2.6 KiB
Diff
66 lines
2.6 KiB
Diff
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From c11428c7def52671f57089701efe878f7071b696 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
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Date: Thu, 17 Feb 2022 01:08:37 +0100
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Subject: [PATCH 1/3] ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT
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decision
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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In commit 3fc92a215b69 ("ddr: marvell: a38x: fix SPLIT_OUT_MIX state
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decision") I ported a cleaned up and changed version of patch
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mv_ddr: a380: fix SPLIT_OUT_MIX state decision
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In the port we removed checking for BYTE_HOMOGENEOUS_SPLIT_OUT bit,
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because:
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- the fix seemed to work without it
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- the bit was checked for only at one place out of two, while the second
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bit, BYTE_SPLIT_OUT_MIX, was checked for in both cases
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- without the removal it didn't work on Allied Telesis' x530 board
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We recently had a chance to test on more boards, and it seems that the
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change needs to be opposite: instead of removing the check for
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BYTE_HOMOGENEOUS_SPLIT_OUT from the first if() statement, the check
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needs to be added also to the second one - it needs to be at both
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places.
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With this change all the Turris Omnia boards I have had available to
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test seem to work, I didn't encounter not even one failed DDR training.
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As last time, I am noting that I do not understand what this code is
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actually doing, I haven't studied the DDR training algorithm and
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I suspect that no one will be able to explain it to U-Boot contributors,
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so we are left with this blind poking in the code with testing whether
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it works on several boards and hoping it doesn't break anything for
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anyone :-(.
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Signed-off-by: Marek Behún <marek.behun@nic.cz>
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Tested-by: Chris Packham <judge.packham@gmail.com>
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Reviewed-by: Stefan Roese <sr@denx.de>
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---
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drivers/ddr/marvell/a38x/ddr3_training_centralization.c | 6 ++++--
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1 file changed, 4 insertions(+), 2 deletions(-)
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--- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
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+++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
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@@ -180,7 +180,8 @@ static int ddr3_tip_centralization(u32 d
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[bit_id],
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EDGE_1);
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if (current_byte_status &
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- BYTE_SPLIT_OUT_MIX) {
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+ (BYTE_SPLIT_OUT_MIX |
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+ BYTE_HOMOGENEOUS_SPLIT_OUT)) {
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if (cur_start_win[bit_id] >= 64)
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cur_start_win[bit_id] -= 64;
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else
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@@ -197,7 +198,8 @@ static int ddr3_tip_centralization(u32 d
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EDGE_1);
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if (cur_end_win[bit_id] >= 64 &&
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(current_byte_status &
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- BYTE_SPLIT_OUT_MIX)) {
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+ (BYTE_SPLIT_OUT_MIX |
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+ BYTE_HOMOGENEOUS_SPLIT_OUT))) {
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cur_end_win[bit_id] -= 64;
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DEBUG_CENTRALIZATION_ENGINE
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(DEBUG_LEVEL_INFO,
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