openwrt/target/linux/ath79/dts/ar7242_engenius_ecb350-v1.dts

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ath79: add support for Senao Engenius ECB350 v1 FCC ID: A8J-ECB350 Engenius ECB350 v1 is an indoor wireless access point with a gigabit ethernet port, 2.4 GHz wireless, external antennas, and PoE. **Specification:** - AR7242 SOC - AR9283 WLAN 2.4 GHz (2x2), PCIe on-board - AR8035-A switch RGMII, GbE with 802.3af PoE - 40 MHz reference clock - 8 MB FLASH 25L6406EM2I-12G - 32 MB RAM - UART at J2 (populated) - 2 external antennas - 3 LEDs, 1 button (power, lan, wlan) (reset) **MAC addresses:** MACs are labeled as WLAN and WAN vendor MAC addresses in flash are duplicate phy0 WLAN *:b8 --- eth0 WAN *:b9 art 0x0/0x6 **Installation:** - if you get Failsafe Mode from failed flash: only use it to flash Original firmware from Engenius or risk kernel loop or halt which requires serial cable Method 1: Firmware upgrade page: OEM webpage at 192.168.1.1 username and password "admin" Navigate to "Firmware" page from left pane Click Browse and select the factory.bin image Upload and verify checksum Click Continue to confirm and wait 3 minutes Method 2: Serial to load Failsafe webpage: After connecting to serial console and rebooting... Interrupt uboot with any key pressed rapidly execute `run failsafe_boot` OR `bootm 0x9f670000` wait a minute connect to ethernet and navigate to "192.168.1.1/index.htm" Select the factory.bin image and upload wait about 3 minutes **Return to OEM:** If you have a serial cable, see Serial Failsafe instructions otherwise, uboot-env can be used to make uboot load the failsafe image *DISCLAIMER* The Failsafe image is unique to Engenius boards. If the failsafe image is missing or damaged this will not work DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt ssh into openwrt and run `fw_setenv rootfs_checksum 0` reboot, wait 3 minutes connect to ethernet and navigate to 192.168.1.1/index.htm select OEM firmware image from Engenius and click upgrade **TFTP recovery** (unstable / not reliable): rename initramfs to 'vmlinux-art-ramdisk' make available on TFTP server at 192.168.1.101 power board while holding or pressing reset button repeatedly NOTE: for some Engenius boards TFTP is not reliable try setting MTU to 600 and try many times **Format of OEM firmware image:** The OEM software of ECB350 v1 is a heavily modified version of Openwrt Kamikaze. One of the many modifications is to the sysupgrade program. Image verification is performed by the successful ungzip and untar of the supplied file and name check and header verification of the resulting contents. To form a factory.bin that is accepted by OEM Openwrt build, the kernel and rootfs must have specific names and begin with the respective headers (uImage, squashfs). Then the files must be tarballed and gzipped. The resulting binary is actually a tar.gz file in disguise. This can be verified by using binwalk on the OEM firmware images, ungzipping then untaring. The OEM upgrade script is at /etc/fwupgrade.sh. OKLI kernel loader is required because the OEM software expects the kernel size to be no greater than 1536k and otherwise the factory.bin upgrade procedure would overwrite part of the kernel when writing rootfs. The factory upgrade script follows the original mtd partitions. **Note on PLL-data cells:** The default PLL register values will not work because of the AR8035 switch between the SOC and the ethernet port. For AR724x series, the PLL register for GMAC0 can be seen in the DTSI as 0x2c. Therefore the PLL register can be read from u-boot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x1805002c 1` However the registers that u-boot sets are not ideal and sometimes wrong... the at803x driver supports setting the RGMII clock/data delay on the PHY side. This way the pll-data register only needs to handle invert and phase. for this board no extra adjustements are needed on the MAC side all link speeds functional Signed-off-by: Michael Pratt <mcpratt@pm.me>
2020-11-03 23:00:02 +00:00
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7242.dtsi"
ath79: adjust ath79/tiny Senao APs to 4k blocksize ath79/tiny kernel config has CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y from commit 05d35403b211ccb9bf20e2b3c0b7a30c82c6d6a2 Because of this, these changes are required for 2 reasons: 1. Senao devices in ath79/tiny with a 'failsafe' partition and the tar.gz sysupgrade platform and a flash chip that supports 4k sectors will fail to reboot to openwrt after a sysupgrade. the stored checksum is made with the 64k blocksize length of the image to be flashed, and the actual checksum changes after flashing due to JFFS2 space being formatted within the length of the rootfs from the image example: 0x440000 length of kernel + rootfs (from sysupgrade.bin) 0x439000 offset of rootfs_data (from kernel log) 2. for boards with flash chips that support 4k sectors: saving configuration over sysupgrade is not possible because sysupgrade.tgz is appended at a 64k boundary and the mtd parser starts JFFS2 at a 4k boundary. for boards with flash chips that do not support 4k sectors: partitioning with 4k boundaries causes a boot loop from the mtd parser not finding kernel and rootfs. Also: Some of the Senao boards that belong in ath79/tiny, for example ENH202, have a flash chip that does not support 4k sectors (no SECT_4K symbol in upstream source). Because of this, partitioning must be different for these devices depending on the flash chip model detected by the kernel. Therefore: this creates 2 DTSI files to replace the single one with 64k partitioning for 4k and 64k partitioning respectively. Signed-off-by: Michael Pratt <mcpratt@pm.me>
2021-02-21 22:41:30 +00:00
#include "ar724x_senao_loader-4k.dtsi"
ath79: add support for Senao Engenius ECB350 v1 FCC ID: A8J-ECB350 Engenius ECB350 v1 is an indoor wireless access point with a gigabit ethernet port, 2.4 GHz wireless, external antennas, and PoE. **Specification:** - AR7242 SOC - AR9283 WLAN 2.4 GHz (2x2), PCIe on-board - AR8035-A switch RGMII, GbE with 802.3af PoE - 40 MHz reference clock - 8 MB FLASH 25L6406EM2I-12G - 32 MB RAM - UART at J2 (populated) - 2 external antennas - 3 LEDs, 1 button (power, lan, wlan) (reset) **MAC addresses:** MACs are labeled as WLAN and WAN vendor MAC addresses in flash are duplicate phy0 WLAN *:b8 --- eth0 WAN *:b9 art 0x0/0x6 **Installation:** - if you get Failsafe Mode from failed flash: only use it to flash Original firmware from Engenius or risk kernel loop or halt which requires serial cable Method 1: Firmware upgrade page: OEM webpage at 192.168.1.1 username and password "admin" Navigate to "Firmware" page from left pane Click Browse and select the factory.bin image Upload and verify checksum Click Continue to confirm and wait 3 minutes Method 2: Serial to load Failsafe webpage: After connecting to serial console and rebooting... Interrupt uboot with any key pressed rapidly execute `run failsafe_boot` OR `bootm 0x9f670000` wait a minute connect to ethernet and navigate to "192.168.1.1/index.htm" Select the factory.bin image and upload wait about 3 minutes **Return to OEM:** If you have a serial cable, see Serial Failsafe instructions otherwise, uboot-env can be used to make uboot load the failsafe image *DISCLAIMER* The Failsafe image is unique to Engenius boards. If the failsafe image is missing or damaged this will not work DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt ssh into openwrt and run `fw_setenv rootfs_checksum 0` reboot, wait 3 minutes connect to ethernet and navigate to 192.168.1.1/index.htm select OEM firmware image from Engenius and click upgrade **TFTP recovery** (unstable / not reliable): rename initramfs to 'vmlinux-art-ramdisk' make available on TFTP server at 192.168.1.101 power board while holding or pressing reset button repeatedly NOTE: for some Engenius boards TFTP is not reliable try setting MTU to 600 and try many times **Format of OEM firmware image:** The OEM software of ECB350 v1 is a heavily modified version of Openwrt Kamikaze. One of the many modifications is to the sysupgrade program. Image verification is performed by the successful ungzip and untar of the supplied file and name check and header verification of the resulting contents. To form a factory.bin that is accepted by OEM Openwrt build, the kernel and rootfs must have specific names and begin with the respective headers (uImage, squashfs). Then the files must be tarballed and gzipped. The resulting binary is actually a tar.gz file in disguise. This can be verified by using binwalk on the OEM firmware images, ungzipping then untaring. The OEM upgrade script is at /etc/fwupgrade.sh. OKLI kernel loader is required because the OEM software expects the kernel size to be no greater than 1536k and otherwise the factory.bin upgrade procedure would overwrite part of the kernel when writing rootfs. The factory upgrade script follows the original mtd partitions. **Note on PLL-data cells:** The default PLL register values will not work because of the AR8035 switch between the SOC and the ethernet port. For AR724x series, the PLL register for GMAC0 can be seen in the DTSI as 0x2c. Therefore the PLL register can be read from u-boot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x1805002c 1` However the registers that u-boot sets are not ideal and sometimes wrong... the at803x driver supports setting the RGMII clock/data delay on the PHY side. This way the pll-data register only needs to handle invert and phase. for this board no extra adjustements are needed on the MAC side all link speeds functional Signed-off-by: Michael Pratt <mcpratt@pm.me>
2020-11-03 23:00:02 +00:00
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "engenius,ecb350-v1", "qca,ar7242";
model = "EnGenius ECB350 v1";
aliases {
label-mac-device = &ath9k;
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "green:power";
gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan {
label = "green:wlan";
gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
eee-broken-100tx;
eee-broken-1000t;
};
};
&eth0 {
status = "okay";
nvmem-cells = <&macaddr_art_0 0>;
nvmem-cell-names = "mac-address";
ath79: add support for Senao Engenius ECB350 v1 FCC ID: A8J-ECB350 Engenius ECB350 v1 is an indoor wireless access point with a gigabit ethernet port, 2.4 GHz wireless, external antennas, and PoE. **Specification:** - AR7242 SOC - AR9283 WLAN 2.4 GHz (2x2), PCIe on-board - AR8035-A switch RGMII, GbE with 802.3af PoE - 40 MHz reference clock - 8 MB FLASH 25L6406EM2I-12G - 32 MB RAM - UART at J2 (populated) - 2 external antennas - 3 LEDs, 1 button (power, lan, wlan) (reset) **MAC addresses:** MACs are labeled as WLAN and WAN vendor MAC addresses in flash are duplicate phy0 WLAN *:b8 --- eth0 WAN *:b9 art 0x0/0x6 **Installation:** - if you get Failsafe Mode from failed flash: only use it to flash Original firmware from Engenius or risk kernel loop or halt which requires serial cable Method 1: Firmware upgrade page: OEM webpage at 192.168.1.1 username and password "admin" Navigate to "Firmware" page from left pane Click Browse and select the factory.bin image Upload and verify checksum Click Continue to confirm and wait 3 minutes Method 2: Serial to load Failsafe webpage: After connecting to serial console and rebooting... Interrupt uboot with any key pressed rapidly execute `run failsafe_boot` OR `bootm 0x9f670000` wait a minute connect to ethernet and navigate to "192.168.1.1/index.htm" Select the factory.bin image and upload wait about 3 minutes **Return to OEM:** If you have a serial cable, see Serial Failsafe instructions otherwise, uboot-env can be used to make uboot load the failsafe image *DISCLAIMER* The Failsafe image is unique to Engenius boards. If the failsafe image is missing or damaged this will not work DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt ssh into openwrt and run `fw_setenv rootfs_checksum 0` reboot, wait 3 minutes connect to ethernet and navigate to 192.168.1.1/index.htm select OEM firmware image from Engenius and click upgrade **TFTP recovery** (unstable / not reliable): rename initramfs to 'vmlinux-art-ramdisk' make available on TFTP server at 192.168.1.101 power board while holding or pressing reset button repeatedly NOTE: for some Engenius boards TFTP is not reliable try setting MTU to 600 and try many times **Format of OEM firmware image:** The OEM software of ECB350 v1 is a heavily modified version of Openwrt Kamikaze. One of the many modifications is to the sysupgrade program. Image verification is performed by the successful ungzip and untar of the supplied file and name check and header verification of the resulting contents. To form a factory.bin that is accepted by OEM Openwrt build, the kernel and rootfs must have specific names and begin with the respective headers (uImage, squashfs). Then the files must be tarballed and gzipped. The resulting binary is actually a tar.gz file in disguise. This can be verified by using binwalk on the OEM firmware images, ungzipping then untaring. The OEM upgrade script is at /etc/fwupgrade.sh. OKLI kernel loader is required because the OEM software expects the kernel size to be no greater than 1536k and otherwise the factory.bin upgrade procedure would overwrite part of the kernel when writing rootfs. The factory upgrade script follows the original mtd partitions. **Note on PLL-data cells:** The default PLL register values will not work because of the AR8035 switch between the SOC and the ethernet port. For AR724x series, the PLL register for GMAC0 can be seen in the DTSI as 0x2c. Therefore the PLL register can be read from u-boot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x1805002c 1` However the registers that u-boot sets are not ideal and sometimes wrong... the at803x driver supports setting the RGMII clock/data delay on the PHY side. This way the pll-data register only needs to handle invert and phase. for this board no extra adjustements are needed on the MAC side all link speeds functional Signed-off-by: Michael Pratt <mcpratt@pm.me>
2020-11-03 23:00:02 +00:00
phy-handle = <&phy4>;
phy-mode = "rgmii-id";
pll-data = <0x02000000 0x00000101 0x00001313>;
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
ath79: add support for Senao Engenius ECB350 v1 FCC ID: A8J-ECB350 Engenius ECB350 v1 is an indoor wireless access point with a gigabit ethernet port, 2.4 GHz wireless, external antennas, and PoE. **Specification:** - AR7242 SOC - AR9283 WLAN 2.4 GHz (2x2), PCIe on-board - AR8035-A switch RGMII, GbE with 802.3af PoE - 40 MHz reference clock - 8 MB FLASH 25L6406EM2I-12G - 32 MB RAM - UART at J2 (populated) - 2 external antennas - 3 LEDs, 1 button (power, lan, wlan) (reset) **MAC addresses:** MACs are labeled as WLAN and WAN vendor MAC addresses in flash are duplicate phy0 WLAN *:b8 --- eth0 WAN *:b9 art 0x0/0x6 **Installation:** - if you get Failsafe Mode from failed flash: only use it to flash Original firmware from Engenius or risk kernel loop or halt which requires serial cable Method 1: Firmware upgrade page: OEM webpage at 192.168.1.1 username and password "admin" Navigate to "Firmware" page from left pane Click Browse and select the factory.bin image Upload and verify checksum Click Continue to confirm and wait 3 minutes Method 2: Serial to load Failsafe webpage: After connecting to serial console and rebooting... Interrupt uboot with any key pressed rapidly execute `run failsafe_boot` OR `bootm 0x9f670000` wait a minute connect to ethernet and navigate to "192.168.1.1/index.htm" Select the factory.bin image and upload wait about 3 minutes **Return to OEM:** If you have a serial cable, see Serial Failsafe instructions otherwise, uboot-env can be used to make uboot load the failsafe image *DISCLAIMER* The Failsafe image is unique to Engenius boards. If the failsafe image is missing or damaged this will not work DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt ssh into openwrt and run `fw_setenv rootfs_checksum 0` reboot, wait 3 minutes connect to ethernet and navigate to 192.168.1.1/index.htm select OEM firmware image from Engenius and click upgrade **TFTP recovery** (unstable / not reliable): rename initramfs to 'vmlinux-art-ramdisk' make available on TFTP server at 192.168.1.101 power board while holding or pressing reset button repeatedly NOTE: for some Engenius boards TFTP is not reliable try setting MTU to 600 and try many times **Format of OEM firmware image:** The OEM software of ECB350 v1 is a heavily modified version of Openwrt Kamikaze. One of the many modifications is to the sysupgrade program. Image verification is performed by the successful ungzip and untar of the supplied file and name check and header verification of the resulting contents. To form a factory.bin that is accepted by OEM Openwrt build, the kernel and rootfs must have specific names and begin with the respective headers (uImage, squashfs). Then the files must be tarballed and gzipped. The resulting binary is actually a tar.gz file in disguise. This can be verified by using binwalk on the OEM firmware images, ungzipping then untaring. The OEM upgrade script is at /etc/fwupgrade.sh. OKLI kernel loader is required because the OEM software expects the kernel size to be no greater than 1536k and otherwise the factory.bin upgrade procedure would overwrite part of the kernel when writing rootfs. The factory upgrade script follows the original mtd partitions. **Note on PLL-data cells:** The default PLL register values will not work because of the AR8035 switch between the SOC and the ethernet port. For AR724x series, the PLL register for GMAC0 can be seen in the DTSI as 0x2c. Therefore the PLL register can be read from u-boot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x1805002c 1` However the registers that u-boot sets are not ideal and sometimes wrong... the at803x driver supports setting the RGMII clock/data delay on the PHY side. This way the pll-data register only needs to handle invert and phase. for this board no extra adjustements are needed on the MAC side all link speeds functional Signed-off-by: Michael Pratt <mcpratt@pm.me>
2020-11-03 23:00:02 +00:00
compatible = "pci168c,002a";
reg = <0x0 0 0 0 0>;
nvmem-cells = <&macaddr_art_0 (-1)>;
nvmem-cell-names = "mac-address";
ath79: add support for Senao Engenius ECB350 v1 FCC ID: A8J-ECB350 Engenius ECB350 v1 is an indoor wireless access point with a gigabit ethernet port, 2.4 GHz wireless, external antennas, and PoE. **Specification:** - AR7242 SOC - AR9283 WLAN 2.4 GHz (2x2), PCIe on-board - AR8035-A switch RGMII, GbE with 802.3af PoE - 40 MHz reference clock - 8 MB FLASH 25L6406EM2I-12G - 32 MB RAM - UART at J2 (populated) - 2 external antennas - 3 LEDs, 1 button (power, lan, wlan) (reset) **MAC addresses:** MACs are labeled as WLAN and WAN vendor MAC addresses in flash are duplicate phy0 WLAN *:b8 --- eth0 WAN *:b9 art 0x0/0x6 **Installation:** - if you get Failsafe Mode from failed flash: only use it to flash Original firmware from Engenius or risk kernel loop or halt which requires serial cable Method 1: Firmware upgrade page: OEM webpage at 192.168.1.1 username and password "admin" Navigate to "Firmware" page from left pane Click Browse and select the factory.bin image Upload and verify checksum Click Continue to confirm and wait 3 minutes Method 2: Serial to load Failsafe webpage: After connecting to serial console and rebooting... Interrupt uboot with any key pressed rapidly execute `run failsafe_boot` OR `bootm 0x9f670000` wait a minute connect to ethernet and navigate to "192.168.1.1/index.htm" Select the factory.bin image and upload wait about 3 minutes **Return to OEM:** If you have a serial cable, see Serial Failsafe instructions otherwise, uboot-env can be used to make uboot load the failsafe image *DISCLAIMER* The Failsafe image is unique to Engenius boards. If the failsafe image is missing or damaged this will not work DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt ssh into openwrt and run `fw_setenv rootfs_checksum 0` reboot, wait 3 minutes connect to ethernet and navigate to 192.168.1.1/index.htm select OEM firmware image from Engenius and click upgrade **TFTP recovery** (unstable / not reliable): rename initramfs to 'vmlinux-art-ramdisk' make available on TFTP server at 192.168.1.101 power board while holding or pressing reset button repeatedly NOTE: for some Engenius boards TFTP is not reliable try setting MTU to 600 and try many times **Format of OEM firmware image:** The OEM software of ECB350 v1 is a heavily modified version of Openwrt Kamikaze. One of the many modifications is to the sysupgrade program. Image verification is performed by the successful ungzip and untar of the supplied file and name check and header verification of the resulting contents. To form a factory.bin that is accepted by OEM Openwrt build, the kernel and rootfs must have specific names and begin with the respective headers (uImage, squashfs). Then the files must be tarballed and gzipped. The resulting binary is actually a tar.gz file in disguise. This can be verified by using binwalk on the OEM firmware images, ungzipping then untaring. The OEM upgrade script is at /etc/fwupgrade.sh. OKLI kernel loader is required because the OEM software expects the kernel size to be no greater than 1536k and otherwise the factory.bin upgrade procedure would overwrite part of the kernel when writing rootfs. The factory upgrade script follows the original mtd partitions. **Note on PLL-data cells:** The default PLL register values will not work because of the AR8035 switch between the SOC and the ethernet port. For AR724x series, the PLL register for GMAC0 can be seen in the DTSI as 0x2c. Therefore the PLL register can be read from u-boot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x1805002c 1` However the registers that u-boot sets are not ideal and sometimes wrong... the at803x driver supports setting the RGMII clock/data delay on the PHY side. This way the pll-data register only needs to handle invert and phase. for this board no extra adjustements are needed on the MAC side all link speeds functional Signed-off-by: Michael Pratt <mcpratt@pm.me>
2020-11-03 23:00:02 +00:00
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};
&art {
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
compatible = "mac-base";
reg = <0x0 0x6>;
#nvmem-cell-cells = <1>;
};
};
};