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90 lines
2.8 KiB
Diff
90 lines
2.8 KiB
Diff
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From 7b808449f572d07bee840cd9da7e2fe6a1b8f4b5 Mon Sep 17 00:00:00 2001
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From: Rajendra Nayak <rnayak@codeaurora.org>
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Date: Fri, 6 Aug 2021 09:59:46 +0100
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Subject: [PATCH] nvmem: qfprom: sc7280: Handle the additional power-domains
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vote
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On sc7280, to reliably blow fuses, we need an additional vote
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on max performance state of 'MX' power-domain.
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Add support for power-domain performance state voting in the
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driver.
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Reviewed-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
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Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Link: https://lore.kernel.org/r/20210806085947.22682-4-srinivas.kandagatla@linaro.org
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/nvmem/qfprom.c | 25 +++++++++++++++++++++++++
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1 file changed, 25 insertions(+)
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--- a/drivers/nvmem/qfprom.c
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+++ b/drivers/nvmem/qfprom.c
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@@ -12,6 +12,8 @@
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#include <linux/mod_devicetable.h>
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#include <linux/nvmem-provider.h>
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#include <linux/platform_device.h>
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+#include <linux/pm_domain.h>
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+#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include <linux/regulator/consumer.h>
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@@ -142,6 +144,9 @@ static void qfprom_disable_fuse_blowing(
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writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
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writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
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+ dev_pm_genpd_set_performance_state(priv->dev, 0);
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+ pm_runtime_put(priv->dev);
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+
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/*
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* This may be a shared rail and may be able to run at a lower rate
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* when we're not blowing fuses. At the moment, the regulator framework
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@@ -212,6 +217,14 @@ static int qfprom_enable_fuse_blowing(co
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goto err_clk_rate_set;
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}
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+ ret = pm_runtime_get_sync(priv->dev);
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+ if (ret < 0) {
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+ pm_runtime_put_noidle(priv->dev);
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+ dev_err(priv->dev, "Failed to enable power-domain\n");
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+ goto err_reg_enable;
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+ }
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+ dev_pm_genpd_set_performance_state(priv->dev, INT_MAX);
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+
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old->timer_val = readl(priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
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old->accel_val = readl(priv->qfpconf + QFPROM_ACCEL_OFFSET);
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writel(priv->soc_data->qfprom_blow_timer_value,
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@@ -221,6 +234,8 @@ static int qfprom_enable_fuse_blowing(co
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return 0;
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+err_reg_enable:
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+ regulator_disable(priv->vcc);
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err_clk_rate_set:
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clk_set_rate(priv->secclk, old->clk_rate);
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err_clk_prepared:
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@@ -320,6 +335,11 @@ static int qfprom_reg_read(void *context
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return 0;
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}
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+static void qfprom_runtime_disable(void *data)
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+{
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+ pm_runtime_disable(data);
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+}
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+
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static const struct qfprom_soc_data qfprom_7_8_data = {
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.accel_value = 0xD10,
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.qfprom_blow_timer_value = 25,
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@@ -420,6 +440,11 @@ static int qfprom_probe(struct platform_
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econfig.reg_write = qfprom_reg_write;
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}
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+ pm_runtime_enable(dev);
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+ ret = devm_add_action_or_reset(dev, qfprom_runtime_disable, dev);
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+ if (ret)
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+ return ret;
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+
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nvmem = devm_nvmem_register(dev, &econfig);
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return PTR_ERR_OR_ZERO(nvmem);
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