2024-04-10 14:14:32 +00:00
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From 617b07e08bcb1f69a72a085a7d847d1ca2999830 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Jan 2024 08:35:52 +0300
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Subject: [PATCH 05/30] net: dsa: mt7530: always trap frames to active CPU port
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on MT7530
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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On the MT7530 switch, the CPU_PORT field indicates which CPU port to trap
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frames to, regardless of the affinity of the inbound user port.
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When multiple CPU ports are in use, if the DSA conduit interface is down,
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trapped frames won't be passed to the conduit interface.
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To make trapping frames work including this case, implement
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ds->ops->conduit_state_change() on this subdriver and set the CPU_PORT
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field to the numerically smallest CPU port whose conduit interface is up.
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Introduce the active_cpu_ports field to store the information of the active
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CPU ports. Correct the macros, CPU_PORT is bits 4 through 6 of the
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register.
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Add a comment to explain frame trapping for this switch.
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Currently, the driver doesn't support the use of multiple CPU ports so this
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is not necessarily a bug fix.
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Suggested-by: Vladimir Oltean <olteanv@gmail.com>
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Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk>
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
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Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-1-042401f2b279@arinc9.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/mt7530.c | 35 +++++++++++++++++++++++++++++++----
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drivers/net/dsa/mt7530.h | 6 ++++--
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2 files changed, 35 insertions(+), 6 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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2024-04-17 19:01:37 +00:00
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@@ -1232,10 +1232,6 @@ mt753x_cpu_port_enable(struct dsa_switch
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2024-04-10 14:14:32 +00:00
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mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |
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UNU_FFP(BIT(port)));
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- /* Set CPU port number */
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- if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
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- mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
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-
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/* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
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* the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
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* is affine to the inbound user port.
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2024-04-17 19:01:37 +00:00
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@@ -3289,6 +3285,36 @@ static int mt753x_set_mac_eee(struct dsa
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2024-04-10 14:14:32 +00:00
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return 0;
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}
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+static void
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+mt753x_conduit_state_change(struct dsa_switch *ds,
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+ const struct net_device *conduit,
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+ bool operational)
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+{
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+ struct dsa_port *cpu_dp = conduit->dsa_ptr;
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+ struct mt7530_priv *priv = ds->priv;
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+ int val = 0;
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+ u8 mask;
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+
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+ /* Set the CPU port to trap frames to for MT7530. Trapped frames will be
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+ * forwarded to the numerically smallest CPU port whose conduit
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+ * interface is up.
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+ */
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+ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
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+ return;
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+
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+ mask = BIT(cpu_dp->index);
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+
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+ if (operational)
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+ priv->active_cpu_ports |= mask;
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+ else
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+ priv->active_cpu_ports &= ~mask;
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+
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+ if (priv->active_cpu_ports)
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+ val = CPU_EN | CPU_PORT(__ffs(priv->active_cpu_ports));
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+
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+ mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val);
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+}
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+
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static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
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{
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return 0;
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2024-04-17 19:01:37 +00:00
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@@ -3344,6 +3370,7 @@ const struct dsa_switch_ops mt7530_switc
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2024-04-10 14:14:32 +00:00
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.phylink_mac_link_up = mt753x_phylink_mac_link_up,
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.get_mac_eee = mt753x_get_mac_eee,
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.set_mac_eee = mt753x_set_mac_eee,
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+ .master_state_change = mt753x_conduit_state_change,
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};
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EXPORT_SYMBOL_GPL(mt7530_switch_ops);
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -41,8 +41,8 @@ enum mt753x_id {
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#define UNU_FFP(x) (((x) & 0xff) << 8)
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#define UNU_FFP_MASK UNU_FFP(~0)
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#define CPU_EN BIT(7)
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-#define CPU_PORT(x) ((x) << 4)
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-#define CPU_MASK (0xf << 4)
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+#define CPU_PORT_MASK GENMASK(6, 4)
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+#define CPU_PORT(x) FIELD_PREP(CPU_PORT_MASK, x)
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#define MIRROR_EN BIT(3)
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#define MIRROR_PORT(x) ((x) & 0x7)
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#define MIRROR_MASK 0x7
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2024-04-17 19:01:37 +00:00
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@@ -785,6 +785,7 @@ struct mt753x_info {
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2024-04-10 14:14:32 +00:00
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* @irq_domain: IRQ domain of the switch irq_chip
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* @irq_enable: IRQ enable bits, synced to SYS_INT_EN
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* @create_sgmii: Pointer to function creating SGMII PCS instance(s)
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+ * @active_cpu_ports: Holding the active CPU ports
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*/
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struct mt7530_priv {
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struct device *dev;
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2024-04-17 19:01:37 +00:00
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@@ -811,6 +812,7 @@ struct mt7530_priv {
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2024-04-10 14:14:32 +00:00
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struct irq_domain *irq_domain;
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u32 irq_enable;
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int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii);
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+ u8 active_cpu_ports;
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};
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struct mt7530_hw_vlan_entry {
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