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65 lines
2.2 KiB
Diff
65 lines
2.2 KiB
Diff
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From 57b528e557890f25e010b6bc7356b5a716c79db2 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Tue, 12 Nov 2024 17:58:52 +0000
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Subject: [PATCH] drm/vc4: hvs: Defer updating the enable_bg_fill until vblank
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The register to enable/disable background fill was being set
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from atomic flush, however that will be applied immediately and
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can be a while before the vblank. If it was required for the
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current frame but not for the next one, that can result in
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corruption for part of the current frame.
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Store the state in vc4_hvs, and update it on vblank.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_drv.h | 2 ++
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drivers/gpu/drm/vc4/vc4_hvs.c | 18 ++++++++++--------
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2 files changed, 12 insertions(+), 8 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -339,6 +339,8 @@ struct vc4_hvs {
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unsigned int enabled: 1;
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} eof_irq[HVS_NUM_CHANNELS];
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+ bool bg_fill[HVS_NUM_CHANNELS];
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+
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unsigned long max_core_rate;
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/* Memory manager for CRTCs to allocate space in the display
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -1470,14 +1470,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
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/* This sets a black background color fill, as is the case
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* with other DRM drivers.
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*/
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- if (enable_bg_fill)
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- HVS_WRITE(SCALER6_DISPX_CTRL1(channel),
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- HVS_READ(SCALER6_DISPX_CTRL1(channel)) |
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- SCALER6(DISPX_CTRL1_BGENB));
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- else
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- HVS_WRITE(SCALER6_DISPX_CTRL1(channel),
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- HVS_READ(SCALER6_DISPX_CTRL1(channel)) &
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- ~SCALER6(DISPX_CTRL1_BGENB));
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+ hvs->bg_fill[channel] = enable_bg_fill;
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} else {
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/* we can actually run with a lower core clock when background
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* fill is enabled on VC4_GEN_5 so leave it enabled always.
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@@ -1662,6 +1655,15 @@ static irqreturn_t vc6_hvs_eof_irq_handl
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if (hvs->eof_irq[i].desc != irq)
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continue;
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+ if (hvs->bg_fill[i])
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+ HVS_WRITE(SCALER6_DISPX_CTRL1(i),
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+ HVS_READ(SCALER6_DISPX_CTRL1(i)) |
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+ SCALER6(DISPX_CTRL1_BGENB));
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+ else
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+ HVS_WRITE(SCALER6_DISPX_CTRL1(i),
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+ HVS_READ(SCALER6_DISPX_CTRL1(i)) &
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+ ~SCALER6(DISPX_CTRL1_BGENB));
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+
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vc4_hvs_schedule_dlist_sweep(hvs, i);
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return IRQ_HANDLED;
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}
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