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openwrt/target/linux/generic/backport-5.15/893-v6.5-04-net-dsa-mv88e6xxx-fix-88E6393X-family-internal-phys-.patch

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generic: 5.15: backport support for Marvell 88E6361 switch New revision of Methode eDPU boards uses Marvell 88E6361 switch, so lets backport it from kernel 6.5. Since 5.15 doesnt have phylink_get_caps I had to modify the backport to use the old mv88e6393x_phylink_validate instead. I had to fixup one more instance of port_max_speed_mode as well that is not present in 6.5. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-09-14 10:44:02 +00:00
From 492b06747f544c19b5ffe531a24b67858764c50e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
Date: Mon, 29 May 2023 10:02:44 +0200
Subject: [PATCH 896/898] net: dsa: mv88e6xxx: fix 88E6393X family internal
phys layout
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
88E6393X/88E6193X/88E6191X switches have in fact 8 internal PHYs, but those
are not present starting at port 0: supported ports go from 1 to 8
Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/dsa/mv88e6xxx/chip.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
kernel: bump 5.15 to 5.15.135 Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.135 All patches automatically rebased. Build system: x86_64 Build-tested: ramips/tplink_archer-a6-v3 Run-tested: ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
2023-10-11 19:53:45 +00:00
@@ -5372,7 +5372,8 @@ static const struct mv88e6xxx_info mv88e
generic: 5.15: backport support for Marvell 88E6361 switch New revision of Methode eDPU boards uses Marvell 88E6361 switch, so lets backport it from kernel 6.5. Since 5.15 doesnt have phylink_get_caps I had to modify the backport to use the old mv88e6393x_phylink_validate instead. I had to fixup one more instance of port_max_speed_mode as well that is not present in 6.5. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-09-14 10:44:02 +00:00
.name = "Marvell 88E6191X",
.num_databases = 4096,
.num_ports = 11, /* 10 + Z80 */
- .num_internal_phys = 9,
+ .num_internal_phys = 8,
+ .internal_phys_offset = 1,
.max_vid = 8191,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
kernel: bump 5.15 to 5.15.135 Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.135 All patches automatically rebased. Build system: x86_64 Build-tested: ramips/tplink_archer-a6-v3 Run-tested: ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
2023-10-11 19:53:45 +00:00
@@ -5394,7 +5395,8 @@ static const struct mv88e6xxx_info mv88e
generic: 5.15: backport support for Marvell 88E6361 switch New revision of Methode eDPU boards uses Marvell 88E6361 switch, so lets backport it from kernel 6.5. Since 5.15 doesnt have phylink_get_caps I had to modify the backport to use the old mv88e6393x_phylink_validate instead. I had to fixup one more instance of port_max_speed_mode as well that is not present in 6.5. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-09-14 10:44:02 +00:00
.name = "Marvell 88E6193X",
.num_databases = 4096,
.num_ports = 11, /* 10 + Z80 */
- .num_internal_phys = 9,
+ .num_internal_phys = 8,
+ .internal_phys_offset = 1,
.max_vid = 8191,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
kernel: bump 5.15 to 5.15.135 Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.135 All patches automatically rebased. Build system: x86_64 Build-tested: ramips/tplink_archer-a6-v3 Run-tested: ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
2023-10-11 19:53:45 +00:00
@@ -5704,7 +5706,8 @@ static const struct mv88e6xxx_info mv88e
generic: 5.15: backport support for Marvell 88E6361 switch New revision of Methode eDPU boards uses Marvell 88E6361 switch, so lets backport it from kernel 6.5. Since 5.15 doesnt have phylink_get_caps I had to modify the backport to use the old mv88e6393x_phylink_validate instead. I had to fixup one more instance of port_max_speed_mode as well that is not present in 6.5. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-09-14 10:44:02 +00:00
.name = "Marvell 88E6393X",
.num_databases = 4096,
.num_ports = 11, /* 10 + Z80 */
- .num_internal_phys = 9,
+ .num_internal_phys = 8,
+ .internal_phys_offset = 1,
.max_vid = 8191,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
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