2021-07-09 22:58:18 +00:00
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From 24a43ae2ac0ea06c474b1c80dc75651294d49321 Mon Sep 17 00:00:00 2001
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From: Thomas Nixon <tom@tomn.co.uk>
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Date: Sat, 2 Oct 2021 00:48:05 +0100
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Subject: [PATCH 2/2] net: lantiq: enable jumbo frames on GSWIP
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This enables non-standard MTUs on a per-port basis, with the overall
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frame size set based on the CPU port.
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When the MTU is not changed, this should have no effect.
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Long packets crash the switch with MTUs of greater than 2526, so the
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maximum is limited for now.
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Signed-off-by: Thomas Nixon <tom@tomn.co.uk>
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---
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drivers/net/dsa/lantiq_gswip.c | 46 +++++++++++++++++++++++++++++++---
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1 file changed, 42 insertions(+), 4 deletions(-)
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--- a/drivers/net/dsa/lantiq_gswip.c
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+++ b/drivers/net/dsa/lantiq_gswip.c
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@@ -238,6 +238,11 @@
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#define XRX200_GPHY_FW_ALIGN (16 * 1024)
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+/* maximum packet size supported by the switch; in theory this should be 9600,
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+ * but long packets currently cause lock-ups with an MTU of over 2526
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+ */
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+#define GSWIP_MAX_PACKET_LENGTH 2556
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+
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struct gswip_hw_info {
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int max_ports;
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int cpu_port;
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2022-02-16 14:46:00 +00:00
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@@ -856,10 +861,6 @@ static int gswip_setup(struct dsa_switch
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2021-07-09 22:58:18 +00:00
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gswip_switch_mask(priv, 0, GSWIP_PCE_PCTRL_0_INGRESS,
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GSWIP_PCE_PCTRL_0p(cpu_port));
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- gswip_switch_mask(priv, 0, GSWIP_MAC_CTRL_2_MLEN,
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- GSWIP_MAC_CTRL_2p(cpu_port));
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- gswip_switch_w(priv, VLAN_ETH_FRAME_LEN + 8 + ETH_FCS_LEN,
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- GSWIP_MAC_FLEN);
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gswip_switch_mask(priv, 0, GSWIP_BM_QUEUE_GCTRL_GL_MOD,
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GSWIP_BM_QUEUE_GCTRL);
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2022-02-16 14:46:00 +00:00
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@@ -876,6 +877,8 @@ static int gswip_setup(struct dsa_switch
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2021-07-09 22:58:18 +00:00
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return err;
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}
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+ ds->mtu_enforcement_ingress = true;
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+
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gswip_port_enable(ds, cpu_port, NULL);
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return 0;
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}
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2022-02-16 14:46:00 +00:00
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@@ -1438,6 +1441,39 @@ static int gswip_port_fdb_dump(struct ds
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2021-07-09 22:58:18 +00:00
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return 0;
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}
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+static int gswip_port_max_mtu(struct dsa_switch *ds, int port)
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+{
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+ /* includes 8 bytes for special header */
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+ return GSWIP_MAX_PACKET_LENGTH - VLAN_ETH_HLEN - ETH_FCS_LEN;
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+}
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+
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+static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
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+{
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+ struct gswip_priv *priv = ds->priv;
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+ int cpu_port = priv->hw_info->cpu_port;
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+
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+ /* cpu port always has maximum mtu of user ports, so use it to set
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+ * switch frame size, including 8 byte special header
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+ */
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+ if (port == cpu_port) {
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+ new_mtu += 8;
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+ gswip_switch_w(priv, VLAN_ETH_HLEN + new_mtu + ETH_FCS_LEN,
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+ GSWIP_MAC_FLEN);
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+ }
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+
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+ /* enable MLEN for ports with non-standard MTUs, including the special
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+ * header on the CPU port added above
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+ */
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+ if (new_mtu != ETH_DATA_LEN)
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+ gswip_switch_mask(priv, 0, GSWIP_MAC_CTRL_2_MLEN,
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+ GSWIP_MAC_CTRL_2p(port));
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+ else
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+ gswip_switch_mask(priv, GSWIP_MAC_CTRL_2_MLEN, 0,
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+ GSWIP_MAC_CTRL_2p(port));
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+
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+ return 0;
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+}
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+
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static void gswip_phylink_validate(struct dsa_switch *ds, int port,
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unsigned long *supported,
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struct phylink_link_state *state)
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2022-02-16 14:46:00 +00:00
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@@ -1781,6 +1817,8 @@ static const struct dsa_switch_ops gswip
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2021-07-09 22:58:18 +00:00
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.port_fdb_add = gswip_port_fdb_add,
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.port_fdb_del = gswip_port_fdb_del,
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.port_fdb_dump = gswip_port_fdb_dump,
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+ .port_change_mtu = gswip_port_change_mtu,
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+ .port_max_mtu = gswip_port_max_mtu,
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.phylink_validate = gswip_phylink_validate,
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.phylink_mac_config = gswip_phylink_mac_config,
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.phylink_mac_link_down = gswip_phylink_mac_link_down,
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