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39 lines
1.1 KiB
Diff
39 lines
1.1 KiB
Diff
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From ed880b7572e1135e3bd8382d4670a375f7d9c91b Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Tue, 2 Mar 2021 15:56:17 +0800
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Subject: [PATCH 10/21] mmc: mtk-sd: increase the minimum bus frequency
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With a 48MHz input clock, the lowest bus frequency can be as low as
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48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
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the mmc framework take seconds to finish the initialization.
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Limiting the minimum bus frequency to a slightly higher value can solve the
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issue without any side effects.
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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drivers/mmc/mtk-sd.c | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/drivers/mmc/mtk-sd.c
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+++ b/drivers/mmc/mtk-sd.c
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@@ -232,6 +232,8 @@
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#define SCLK_CYCLES_SHIFT 20
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+#define MIN_BUS_CLK 260000
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+
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#define CMD_INTS_MASK \
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(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
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@@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice
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else
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cfg->f_min = host->src_clk_freq / (4 * 4095);
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+ if (cfg->f_min < MIN_BUS_CLK)
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+ cfg->f_min = MIN_BUS_CLK;
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+
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cfg->f_max = host->src_clk_freq;
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cfg->b_max = 1024;
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