2022-05-28 19:34:48 +00:00
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--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
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+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
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@@ -296,6 +296,7 @@ enum cvmx_board_types_enum {
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CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
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CVMX_BOARD_TYPE_UBNT_E100 = 20002,
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CVMX_BOARD_TYPE_UBNT_E200 = 20003,
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+ CVMX_BOARD_TYPE_UBNT_USG = 20004,
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CVMX_BOARD_TYPE_UBNT_E220 = 20005,
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CVMX_BOARD_TYPE_ITUS_SHIELD = 20006,
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CVMX_BOARD_TYPE_UBNT_E300 = 20300,
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@@ -399,6 +400,7 @@ static inline const char *cvmx_board_typ
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/* Customer private range */
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
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+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_USG)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_ITUS_SHIELD)
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--- a/arch/mips/cavium-octeon/octeon-platform.c
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+++ b/arch/mips/cavium-octeon/octeon-platform.c
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2022-08-25 14:52:50 +00:00
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@@ -635,6 +635,7 @@ static void __init octeon_rx_tx_delay(in
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2022-05-28 19:34:48 +00:00
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}
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break;
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case CVMX_BOARD_TYPE_UBNT_E100:
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+ case CVMX_BOARD_TYPE_UBNT_USG:
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if (iface == 0 && port <= 2) {
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_octeon_rx_tx_delay(eth, 0x0, 0x10);
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return;
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--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
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+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
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@@ -170,6 +170,7 @@ int cvmx_helper_board_get_mii_address(in
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else
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return -1;
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case CVMX_BOARD_TYPE_UBNT_E100:
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+ case CVMX_BOARD_TYPE_UBNT_USG:
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if (ipd_port >= 0 && ipd_port <= 2)
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return 7 - ipd_port;
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else
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@@ -337,6 +338,7 @@ enum cvmx_helper_board_usb_clock_types _
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case CVMX_BOARD_TYPE_LANAI2_G:
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case CVMX_BOARD_TYPE_NIC10E_66:
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case CVMX_BOARD_TYPE_UBNT_E100:
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+ case CVMX_BOARD_TYPE_UBNT_USG:
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return USB_CLOCK_TYPE_CRYSTAL_12;
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case CVMX_BOARD_TYPE_NIC10E:
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return USB_CLOCK_TYPE_REF_12;
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