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https://github.com/openwrt/openwrt.git
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86 lines
2.5 KiB
Diff
86 lines
2.5 KiB
Diff
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From 490d103232287eb51c92c49a4ef8865fd0a9d59e Mon Sep 17 00:00:00 2001
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From: Sham Muthayyan <smuthayy@codeaurora.org>
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Date: Tue, 19 Jul 2016 18:58:18 +0530
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Subject: PCI: qcom: Fixed IPQ806x PCIE reset changes
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Change-Id: Ia6590e960b9754b1e8b7a51f318788cd63e9e321
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Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
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---
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drivers/pci/host/pcie-qcom.c | 24 +++++++++++++++++++-----
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1 file changed, 19 insertions(+), 5 deletions(-)
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--- a/drivers/pci/host/pcie-qcom.c
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+++ b/drivers/pci/host/pcie-qcom.c
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@@ -60,6 +60,7 @@ struct qcom_pcie_resources_v0 {
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struct reset_control *ahb_reset;
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struct reset_control *por_reset;
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struct reset_control *phy_reset;
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+ struct reset_control *ext_reset;
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struct regulator *vdda;
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struct regulator *vdda_phy;
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struct regulator *vdda_refclk;
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@@ -190,6 +191,10 @@ static int qcom_pcie_get_resources_v0(st
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if (IS_ERR(res->phy_reset))
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return PTR_ERR(res->phy_reset);
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+ res->ext_reset = devm_reset_control_get(dev, "ext");
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+ if (IS_ERR(res->ext_reset))
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+ return PTR_ERR(res->ext_reset);
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+
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return 0;
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}
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@@ -234,6 +239,7 @@ static void qcom_pcie_deinit_v0(struct q
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reset_control_assert(res->ahb_reset);
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reset_control_assert(res->por_reset);
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reset_control_assert(res->pci_reset);
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+ reset_control_assert(res->ext_reset);
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clk_disable_unprepare(res->iface_clk);
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clk_disable_unprepare(res->core_clk);
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clk_disable_unprepare(res->phy_clk);
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@@ -251,6 +257,12 @@ static int qcom_pcie_init_v0(struct qcom
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u32 val;
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int ret;
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+ ret = reset_control_assert(res->ahb_reset);
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+ if (ret) {
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+ dev_err(dev, "cannot assert ahb reset\n");
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+ return ret;
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+ }
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+
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ret = regulator_enable(res->vdda);
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if (ret) {
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dev_err(dev, "cannot enable vdda regulator\n");
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@@ -269,16 +281,16 @@ static int qcom_pcie_init_v0(struct qcom
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goto err_vdda_phy;
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}
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- ret = reset_control_assert(res->ahb_reset);
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+ ret = reset_control_deassert(res->ext_reset);
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if (ret) {
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- dev_err(dev, "cannot assert ahb reset\n");
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- goto err_assert_ahb;
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+ dev_err(dev, "cannot assert ext reset\n");
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+ goto err_reset_ext;
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}
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ret = clk_prepare_enable(res->iface_clk);
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if (ret) {
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dev_err(dev, "cannot prepare/enable iface clock\n");
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- goto err_assert_ahb;
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+ goto err_iface;
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}
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ret = clk_prepare_enable(res->core_clk);
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@@ -360,7 +372,9 @@ err_clk_phy:
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clk_disable_unprepare(res->core_clk);
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err_clk_core:
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clk_disable_unprepare(res->iface_clk);
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-err_assert_ahb:
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+err_iface:
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+ reset_control_assert(res->ext_reset);
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+err_reset_ext:
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regulator_disable(res->vdda_phy);
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err_vdda_phy:
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regulator_disable(res->vdda_refclk);
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