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93 lines
4.0 KiB
Diff
93 lines
4.0 KiB
Diff
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From ef972fc9f5743da589ce9546dd565d6c56e679b8 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 8 Apr 2024 10:08:53 +0300
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Subject: [PATCH 1/2] net: dsa: mt7530: fix enabling EEE on MT7531 switch on
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all boards
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features")
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brought EEE support but did not enable EEE on MT7531 switch MACs. EEE is
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enabled on MT7531 switch MACs by pulling the LAN2LED0 pin low on the board
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(bootstrapping), unsetting the EEE_DIS bit on the trap register, or setting
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the internal EEE switch bit on the CORE_PLL_GROUP4 register. Thanks to
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SkyLake Huang (黃啟澤) from MediaTek for providing information on the
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internal EEE switch bit.
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There are existing boards that were not designed to pull the pin low.
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Because of that, the EEE status currently depends on the board design.
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The EEE_DIS bit on the trap pertains to the LAN2LED0 pin which is usually
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used to control an LED. Once the bit is unset, the pin will be low. That
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will make the active low LED turn on. The pin is controlled by the switch
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PHY. It seems that the PHY controls the pin in the way that it inverts the
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pin state. That means depending on the wiring of the LED connected to
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LAN2LED0 on the board, the LED may be on without an active link.
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To not cause this unwanted behaviour whilst enabling EEE on all boards, set
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the internal EEE switch bit on the CORE_PLL_GROUP4 register.
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My testing on MT7531 shows a certain amount of traffic loss when EEE is
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enabled. That said, I haven't come across a board that enables EEE. So
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enable EEE on the switch MACs but disable EEE advertisement on the switch
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PHYs. This way, we don't change the behaviour of the majority of the boards
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that have this switch. The mediatek-ge PHY driver already disables EEE
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advertisement on the switch PHYs but my testing shows that it is somehow
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enabled afterwards. Disabling EEE advertisement before the PHY driver
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initialises keeps it off.
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With this change, EEE can now be enabled using ethtool.
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Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features")
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Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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---
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drivers/net/dsa/mt7530.c | 17 ++++++++++++-----
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drivers/net/dsa/mt7530.h | 1 +
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2 files changed, 13 insertions(+), 5 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2505,18 +2505,25 @@ mt7531_setup(struct dsa_switch *ds)
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mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
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MT7531_GPIO0_INTERRUPT);
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- /* Enable PHY core PLL, since phy_device has not yet been created
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- * provided for phy_[read,write]_mmd_indirect is called, we provide
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- * our own mt7531_ind_mmd_phy_[read,write] to complete this
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- * function.
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+ /* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since
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+ * phy_device has not yet been created provided for
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+ * phy_[read,write]_mmd_indirect is called, we provide our own
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+ * mt7531_ind_mmd_phy_[read,write] to complete this function.
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*/
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val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR,
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MDIO_MMD_VEND2, CORE_PLL_GROUP4);
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- val |= MT7531_PHY_PLL_BYPASS_MODE;
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+ val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE;
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val &= ~MT7531_PHY_PLL_OFF;
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mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2,
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CORE_PLL_GROUP4, val);
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+ /* Disable EEE advertisement on the switch PHYs. */
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+ for (i = MT753X_CTRL_PHY_ADDR;
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+ i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) {
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+ mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV,
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+ 0);
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+ }
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+
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mt7531_setup_common(ds);
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/* Setup VLAN ID 0 for VLAN-unaware bridges */
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -616,6 +616,7 @@ enum mt7531_clk_skew {
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#define RG_SYSPLL_DDSFBK_EN BIT(12)
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#define RG_SYSPLL_BIAS_EN BIT(11)
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#define RG_SYSPLL_BIAS_LPF_EN BIT(10)
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+#define MT7531_RG_SYSPLL_DMY2 BIT(6)
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#define MT7531_PHY_PLL_OFF BIT(5)
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#define MT7531_PHY_PLL_BYPASS_MODE BIT(4)
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