openwrt/target/linux/bcm63xx/patches-5.15/111-drivers-mtd-nand-macronix-comment-unused-function.patch

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From 00cf359b486a3d14c29014e9d57d92ab81972866 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 9 May 2023 14:03:08 +0200
Subject: [PATCH] drivers: mtd: nand: macronix: comment unused function
Comment unused function since macronix_nand_block_protection_support
cause booting problems.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/mtd/nand/raw/nand_macronix.c | 132 +++++++++++++--------------
1 file changed, 66 insertions(+), 66 deletions(-)
--- a/drivers/mtd/nand/raw/nand_macronix.c
+++ b/drivers/mtd/nand/raw/nand_macronix.c
@@ -179,72 +179,72 @@ static void macronix_nand_fix_broken_get
ONFI_FEATURE_ADDR_TIMING_MODE, 1);
}
-/*
- * Macronix NAND supports Block Protection by Protectoin(PT) pin;
- * active high at power-on which protects the entire chip even the #WP is
- * disabled. Lock/unlock protection area can be partition according to
- * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
- */
-static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
-{
- u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
- int ret;
-
- feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
- nand_select_target(chip, 0);
- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
- feature);
- nand_deselect_target(chip);
- if (ret)
- pr_err("%s all blocks failed\n", __func__);
-
- return ret;
-}
-
-static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
-{
- u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
- int ret;
-
- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
- nand_select_target(chip, 0);
- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
- feature);
- nand_deselect_target(chip);
- if (ret)
- pr_err("%s all blocks failed\n", __func__);
-
- return ret;
-}
-
-static void macronix_nand_block_protection_support(struct nand_chip *chip)
-{
- u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
- int ret;
-
- bitmap_set(chip->parameters.get_feature_list,
- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
-
- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
- nand_select_target(chip, 0);
- ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
- feature);
- nand_deselect_target(chip);
- if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
- if (ret)
- pr_err("Block protection check failed\n");
-
- bitmap_clear(chip->parameters.get_feature_list,
- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
- return;
- }
-
- bitmap_set(chip->parameters.set_feature_list,
- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
-
- chip->ops.lock_area = mxic_nand_lock;
- chip->ops.unlock_area = mxic_nand_unlock;
-}
+// /*
+// * Macronix NAND supports Block Protection by Protectoin(PT) pin;
+// * active high at power-on which protects the entire chip even the #WP is
+// * disabled. Lock/unlock protection area can be partition according to
+// * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
+// */
+// static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
+// {
+// u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
+// int ret;
+
+// feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
+// nand_select_target(chip, 0);
+// ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
+// feature);
+// nand_deselect_target(chip);
+// if (ret)
+// pr_err("%s all blocks failed\n", __func__);
+
+// return ret;
+// }
+
+// static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
+// {
+// u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
+// int ret;
+
+// feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
+// nand_select_target(chip, 0);
+// ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
+// feature);
+// nand_deselect_target(chip);
+// if (ret)
+// pr_err("%s all blocks failed\n", __func__);
+
+// return ret;
+// }
+
+// static void macronix_nand_block_protection_support(struct nand_chip *chip)
+// {
+// u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
+// int ret;
+
+// bitmap_set(chip->parameters.get_feature_list,
+// ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
+
+// feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
+// nand_select_target(chip, 0);
+// ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
+// feature);
+// nand_deselect_target(chip);
+// if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
+// if (ret)
+// pr_err("Block protection check failed\n");
+
+// bitmap_clear(chip->parameters.get_feature_list,
+// ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
+// return;
+// }
+
+// bitmap_set(chip->parameters.set_feature_list,
+// ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
+
+// chip->ops.lock_area = mxic_nand_lock;
+// chip->ops.unlock_area = mxic_nand_unlock;
+// }
static int nand_power_down_op(struct nand_chip *chip)
{