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41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
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From effa2ef8717b0390e8fb0648e16df1b43610af53 Mon Sep 17 00:00:00 2001
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From: Ban Tao <fengzheng923@gmail.com>
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Date: Tue, 2 Mar 2021 20:40:23 +0800
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Subject: [PATCH 059/117] pwm: sun8i-v536: document device tree bindings
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This adds binding documentation for sun8i-v536 SoC PWM driver.
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Signed-off-by: Ban Tao <fengzheng923@gmail.com>
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---
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.../bindings/pwm/pwm-sun8i-v536.txt | 24 +++++++++++++++++++
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1 file changed, 24 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i-v536.txt
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@@ -0,0 +1,24 @@
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+Allwinner sun8i-v536 SoC PWM controller
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+
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+Required properties:
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+ - compatible: should be "allwinner,<name>-pwm"
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+ "allwinner,sun8i-v833-pwm"
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+ "allwinner,sun8i-v536-pwm"
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+ "allwinner,sun50i-r818-pwm"
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+ "allwinner,sun50i-a133-pwm"
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+ "allwinner,sun50i-r329-pwm"
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+ - reg: physical base address and length of the controller's registers
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+ - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
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+ the cells format.
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+ - clocks: From common clock binding, handle to the parent clock.
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+ - resets: From reset clock binding, handle to the parent clock.
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+
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+Example:
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+
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+ pwm: pwm@300a0000 {
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+ compatible = "allwinner,sun50i-r818-pwm";
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+ reg = <0x0300a000 0x3ff>;
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+ clocks = <&ccu CLK_BUS_PWM>;
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+ resets = <&ccu RST_BUS_PWM>;
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+ #pwm-cells = <3>;
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+ };
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