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167 lines
3.7 KiB
Diff
167 lines
3.7 KiB
Diff
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From 438e53828c08cf0e8a65b61cf6ce1e4b6620551a Mon Sep 17 00:00:00 2001
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From: Sam Shih <sam.shih@mediatek.com>
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Date: Sun, 6 Nov 2022 09:50:24 +0100
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Subject: [PATCH 02/19] arm64: dts: mt7986: harmonize device node order
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This arrange device tree nodes in alphabetical order.
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Signed-off-by: Sam Shih <sam.shih@mediatek.com>
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Link: https://lore.kernel.org/r/20221106085034.12582-2-linux@fw-web.de
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Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 94 ++++++++++----------
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arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 22 ++---
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2 files changed, 58 insertions(+), 58 deletions(-)
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--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
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@@ -54,6 +54,53 @@
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};
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};
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+&pio {
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+ uart1_pins: uart1-pins {
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+ mux {
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+ function = "uart";
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+ groups = "uart1";
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+ };
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+ };
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+
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+ uart2_pins: uart2-pins {
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+ mux {
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+ function = "uart";
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+ groups = "uart2";
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+ };
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+ };
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+
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+ wf_2g_5g_pins: wf-2g-5g-pins {
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+ mux {
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+ function = "wifi";
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+ groups = "wf_2g", "wf_5g";
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+ };
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+ conf {
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+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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+ "WF1_TOP_CLK", "WF1_TOP_DATA";
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+ drive-strength = <4>;
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+ };
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+ };
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+
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+ wf_dbdc_pins: wf-dbdc-pins {
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+ mux {
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+ function = "wifi";
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+ groups = "wf_dbdc";
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+ };
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+ conf {
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+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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+ "WF0_TOP_CLK", "WF0_TOP_DATA";
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+ drive-strength = <4>;
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+ };
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+ };
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+};
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+
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&switch {
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ports {
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#address-cells = <1>;
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@@ -121,50 +168,3 @@
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pinctrl-0 = <&wf_2g_5g_pins>;
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pinctrl-1 = <&wf_dbdc_pins>;
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};
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-
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-&pio {
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- uart1_pins: uart1-pins {
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- mux {
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- function = "uart";
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- groups = "uart1";
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- };
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- };
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-
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- uart2_pins: uart2-pins {
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- mux {
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- function = "uart";
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- groups = "uart2";
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- };
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- };
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-
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- wf_2g_5g_pins: wf-2g-5g-pins {
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- mux {
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- function = "wifi";
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- groups = "wf_2g", "wf_5g";
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- };
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- conf {
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- pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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- "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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- "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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- "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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- "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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- "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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- "WF1_TOP_CLK", "WF1_TOP_DATA";
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- drive-strength = <4>;
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- };
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- };
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-
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- wf_dbdc_pins: wf-dbdc-pins {
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- mux {
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- function = "wifi";
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- groups = "wf_dbdc";
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- };
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- conf {
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- pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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- "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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- "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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- "WF0_TOP_CLK", "WF0_TOP_DATA";
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- drive-strength = <4>;
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- };
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- };
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-};
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--- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
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@@ -25,10 +25,6 @@
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};
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};
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-&uart0 {
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- status = "okay";
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-};
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-
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ð {
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status = "okay";
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@@ -99,13 +95,6 @@
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};
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};
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-&wifi {
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- status = "okay";
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- pinctrl-names = "default", "dbdc";
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- pinctrl-0 = <&wf_2g_5g_pins>;
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- pinctrl-1 = <&wf_dbdc_pins>;
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-};
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-
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&pio {
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wf_2g_5g_pins: wf-2g-5g-pins {
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mux {
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@@ -138,3 +127,14 @@
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};
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};
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};
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+
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+&uart0 {
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+ status = "okay";
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+};
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+
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+&wifi {
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+ status = "okay";
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+ pinctrl-names = "default", "dbdc";
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+ pinctrl-0 = <&wf_2g_5g_pins>;
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+ pinctrl-1 = <&wf_dbdc_pins>;
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+};
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