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92 lines
2.8 KiB
Diff
92 lines
2.8 KiB
Diff
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From b4c6046e1c55ddf211215191be9ea6316238889b Mon Sep 17 00:00:00 2001
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From: Stefan Wahren <wahrenst@gmx.net>
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Date: Fri, 20 Sep 2019 07:27:03 +0200
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Subject: [PATCH] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
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commit 42de9ad400afadd41ee027b5feef234a2d2918b9 upstream.
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The new BCM2711 supports an additional clock for the emmc2 block.
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So add a new compatible and register this clock only for BCM2711.
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Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
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Reviewed-by: Matthias Brugger <mbrugger@suse.com>
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Acked-by: Eric Anholt <eric@anholt.net>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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---
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arch/arm/boot/dts/bcm2838.dtsi | 1 +
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drivers/clk/bcm/clk-bcm2835.c | 20 +++++++++++++++++++-
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include/dt-bindings/clock/bcm2835.h | 2 ++
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3 files changed, 22 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/bcm2838.dtsi
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+++ b/arch/arm/boot/dts/bcm2838.dtsi
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@@ -210,7 +210,7 @@
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compatible = "brcm,bcm2711-emmc2";
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status = "okay";
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interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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- clocks = <&clocks BCM2838_CLOCK_EMMC2>;
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+ clocks = <&clocks BCM2711_CLOCK_EMMC2>;
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reg = <0x7e340000 0x100>;
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};
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -124,6 +124,8 @@
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#define CM_AVEODIV 0x1bc
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#define CM_EMMCCTL 0x1c0
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#define CM_EMMCDIV 0x1c4
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+#define CM_EMMC2CTL 0x1d0
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+#define CM_EMMC2DIV 0x1d4
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/* General bits for the CM_*CTL regs */
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# define CM_ENABLE BIT(4)
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@@ -302,7 +304,8 @@
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#define VCMSG_ID_CORE_CLOCK 4
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#define SOC_BCM2835 BIT(0)
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-#define SOC_ALL (SOC_BCM2835)
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+#define SOC_BCM2711 BIT(1)
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+#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
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/*
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* Names of clocks used within the driver that need to be replaced
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@@ -2102,6 +2105,16 @@ static const struct bcm2835_clk_desc clk
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.frac_bits = 8,
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.tcnt_mux = 39),
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+ /* EMMC2 clock (only available for BCM2711) */
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+ [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK(
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+ SOC_BCM2711,
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+ .name = "emmc2",
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+ .ctl_reg = CM_EMMC2CTL,
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+ .div_reg = CM_EMMC2DIV,
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+ .int_bits = 4,
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+ .frac_bits = 8,
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+ .tcnt_mux = 42),
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+
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/* General purpose (GPIO) clocks */
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[BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
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SOC_ALL,
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@@ -2376,8 +2389,13 @@ static const struct cprman_plat_data cpr
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.soc = SOC_BCM2835,
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};
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+static const struct cprman_plat_data cprman_bcm2711_plat_data = {
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+ .soc = SOC_BCM2711,
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+};
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+
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static const struct of_device_id bcm2835_clk_of_match[] = {
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{ .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
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+ { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
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{}
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};
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MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match);
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--- a/include/dt-bindings/clock/bcm2835.h
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+++ b/include/dt-bindings/clock/bcm2835.h
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@@ -66,3 +66,5 @@
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#define BCM2835_CLOCK_DSI1E 48
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#define BCM2835_CLOCK_DSI0P 49
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#define BCM2835_CLOCK_DSI1P 50
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+
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+#define BCM2711_CLOCK_EMMC2 51
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