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78 lines
2.1 KiB
Diff
78 lines
2.1 KiB
Diff
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From cac3c4d67c80c4895d0d44e609beb535d66af6a3 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Sat, 22 Feb 2014 22:35:55 +0100
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Subject: [PATCH] ARM: dt: sun4i: Add A10 SPI controller nodes
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The A10 has 4 SPI controllers that are now supported. Add them in the DT.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
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1 file changed, 44 insertions(+)
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diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
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index f6f41d6..157bc09 100644
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--- a/arch/arm/boot/dts/sun4i-a10.dtsi
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+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
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@@ -339,6 +339,28 @@
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#size-cells = <1>;
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ranges;
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+ spi0: spi@01c05000 {
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+ compatible = "allwinner,sun4i-a10-spi";
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+ reg = <0x01c05000 0x1000>;
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+ interrupts = <10>;
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+ clocks = <&ahb_gates 20>, <&spi0_clk>;
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+ clock-names = "ahb", "mod";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ spi1: spi@01c06000 {
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+ compatible = "allwinner,sun4i-a10-spi";
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+ reg = <0x01c06000 0x1000>;
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+ interrupts = <11>;
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+ clocks = <&ahb_gates 21>, <&spi1_clk>;
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+ clock-names = "ahb", "mod";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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emac: ethernet@01c0b000 {
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compatible = "allwinner,sun4i-a10-emac";
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reg = <0x01c0b000 0x1000>;
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@@ -355,6 +377,28 @@
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#size-cells = <0>;
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};
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+ spi2: spi@01c17000 {
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+ compatible = "allwinner,sun4i-a10-spi";
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+ reg = <0x01c17000 0x1000>;
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+ interrupts = <12>;
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+ clocks = <&ahb_gates 22>, <&spi2_clk>;
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+ clock-names = "ahb", "mod";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ spi3: spi@01c1f000 {
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+ compatible = "allwinner,sun4i-a10-spi";
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+ reg = <0x01c1f000 0x1000>;
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+ interrupts = <50>;
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+ clocks = <&ahb_gates 23>, <&spi3_clk>;
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+ clock-names = "ahb", "mod";
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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intc: interrupt-controller@01c20400 {
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compatible = "allwinner,sun4i-ic";
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reg = <0x01c20400 0x400>;
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--
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2.0.3
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