mirror of
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66 lines
2.5 KiB
Diff
66 lines
2.5 KiB
Diff
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--- a/gcc/config/mips/sync.md
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+++ b/gcc/config/mips/sync.md
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@@ -136,7 +136,7 @@
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[(match_operand:SI 1 "register_operand" "d")
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(match_operand:SI 2 "register_operand" "d")
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(atomic_hiqi_op:SI (match_dup 0)
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- (match_operand:SI 3 "register_operand" "dJ"))]
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+ (match_operand:SI 3 "reg_or_0_operand" "dJ"))]
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UNSPEC_SYNC_OLD_OP_12))
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(clobber (match_scratch:SI 4 "=&d"))]
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"GENERATE_LL_SC"
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@@ -177,7 +177,7 @@
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[(match_operand:SI 2 "register_operand" "d")
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(match_operand:SI 3 "register_operand" "d")
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(atomic_hiqi_op:SI (match_dup 0)
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- (match_operand:SI 4 "register_operand" "dJ"))]
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+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
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UNSPEC_SYNC_OLD_OP_12))
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(clobber (match_scratch:SI 5 "=&d"))]
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"GENERATE_LL_SC"
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@@ -218,7 +218,7 @@
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(match_operand:SI 2 "register_operand" "d")
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(match_operand:SI 3 "register_operand" "d")
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(atomic_hiqi_op:SI (match_dup 0)
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- (match_operand:SI 4 "register_operand" "dJ"))]
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+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
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UNSPEC_SYNC_NEW_OP_12))
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(set (match_dup 1)
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(unspec_volatile:SI
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@@ -259,7 +259,7 @@
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[(match_operand:SI 1 "register_operand" "d")
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(match_operand:SI 2 "register_operand" "d")
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(match_dup 0)
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- (match_operand:SI 3 "register_operand" "dJ")]
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+ (match_operand:SI 3 "reg_or_0_operand" "dJ")]
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UNSPEC_SYNC_OLD_OP_12))
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(clobber (match_scratch:SI 4 "=&d"))]
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"GENERATE_LL_SC"
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@@ -298,7 +298,7 @@
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(unspec_volatile:SI
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[(match_operand:SI 2 "register_operand" "d")
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(match_operand:SI 3 "register_operand" "d")
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- (match_operand:SI 4 "register_operand" "dJ")]
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+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
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UNSPEC_SYNC_OLD_OP_12))
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(clobber (match_scratch:SI 5 "=&d"))]
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"GENERATE_LL_SC"
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@@ -337,7 +337,7 @@
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[(match_operand:SI 1 "memory_operand" "+R")
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(match_operand:SI 2 "register_operand" "d")
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(match_operand:SI 3 "register_operand" "d")
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- (match_operand:SI 4 "register_operand" "dJ")]
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+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
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UNSPEC_SYNC_NEW_OP_12))
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(set (match_dup 1)
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(unspec_volatile:SI
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@@ -546,7 +546,7 @@
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(set (match_dup 1)
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(unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d")
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(match_operand:SI 3 "register_operand" "d")
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- (match_operand:SI 4 "arith_operand" "dJ")]
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+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
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UNSPEC_SYNC_EXCHANGE_12))]
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"GENERATE_LL_SC"
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{ return mips_output_sync_loop (insn, operands); }
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