mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 08:51:13 +00:00
30 lines
1.1 KiB
Diff
30 lines
1.1 KiB
Diff
|
From 23d94cb855b6f4f0ee1c01679224472104ac6440 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Jonas Gorski <jonas.gorski@gmail.com>
|
||
|
|
Date: Sat, 30 Sep 2017 14:10:18 +0200
|
||
|
|
Subject: [PATCH 2/6] bcm63xx_enet: do not write to random DMA channel on
|
||
|
|
BCM6345
|
||
|
|
|
||
|
|
The DMA controller regs actually point to DMA channel 0, so the write to
|
||
|
|
ENETDMA_CFG_REG will actually modify a random DMA channel.
|
||
|
|
|
||
|
|
Since DMA controller registers do not exist on BCM6345, guard the write
|
||
|
|
with the usual check for dma_has_sram.
|
||
|
|
|
||
|
|
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
||
|
|
---
|
||
|
|
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++-
|
||
|
|
1 file changed, 2 insertions(+), 1 deletion(-)
|
||
|
|
|
||
|
|
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||
|
|
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||
|
|
@@ -1062,7 +1062,8 @@ static int bcm_enet_open(struct net_devi
|
||
|
|
val = enet_readl(priv, ENET_CTL_REG);
|
||
|
|
val |= ENET_CTL_ENABLE_MASK;
|
||
|
|
enet_writel(priv, val, ENET_CTL_REG);
|
||
|
|
- enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
|
||
|
|
+ if (priv->dma_has_sram)
|
||
|
|
+ enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
|
||
|
|
enet_dmac_writel(priv, priv->dma_chan_en_mask,
|
||
|
|
ENETDMAC_CHANCFG, priv->rx_chan);
|
||
|
|
|