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43 lines
1.4 KiB
Diff
43 lines
1.4 KiB
Diff
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From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= <dgcbueu@gmail.com>
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Date: Sun, 18 Jun 2023 19:59:25 +0200
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Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The data RAC is left disabled by the bootloader in some SoCs, at least in
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the core it boots from.
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Enabling this feature increases the performance up to +30% depending on the
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task.
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Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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---
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arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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--- a/arch/mips/kernel/smp-bmips.c
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+++ b/arch/mips/kernel/smp-bmips.c
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@@ -615,6 +615,20 @@ void bmips_cpu_setup(void)
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__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
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break;
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+ case CPU_BMIPS4350:
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+ /* Enable data RAC */
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+ if (!(read_c0_brcm_cmt_local() & (1 << 31))) {
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+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
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+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG);
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+ __raw_readl(cbr + BMIPS_RAC_CONFIG);
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+ } else {
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+ cbr = (void __iomem *)0xff400000;
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+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
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+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1);
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+ __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
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+ }
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+ break;
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+
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case CPU_BMIPS4380:
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/* CBG workaround for early BMIPS4380 CPUs */
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switch (read_c0_prid()) {
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