2017-03-04 18:37:50 +00:00
|
|
|
From fc25cd03ca1c696dacb74d2006c0f176ce800566 Mon Sep 17 00:00:00 2001
|
|
|
|
From: Eric Anholt <eric@anholt.net>
|
|
|
|
Date: Tue, 13 Dec 2016 15:15:10 -0800
|
|
|
|
Subject: [PATCH] ARM: bcm2835: dt: Add the DSI module nodes and clocks.
|
|
|
|
|
|
|
|
The modules stay disabled by default, and if you want to enable DSI
|
|
|
|
you'll need an overlay that connects a panel to it.
|
|
|
|
|
|
|
|
Signed-off-by: Eric Anholt <eric@anholt.net>
|
|
|
|
---
|
|
|
|
arch/arm/boot/dts/bcm2835-rpi.dtsi | 8 +++++++
|
|
|
|
arch/arm/boot/dts/bcm283x.dtsi | 49 +++++++++++++++++++++++++++++++++++---
|
|
|
|
2 files changed, 54 insertions(+), 3 deletions(-)
|
|
|
|
|
|
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
|
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
2017-03-22 22:35:39 +00:00
|
|
|
@@ -92,3 +92,11 @@
|
|
|
|
power-domains = <&power RPI_POWER_DOMAIN_VEC>;
|
2017-03-04 18:37:50 +00:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
+
|
|
|
|
+&dsi0 {
|
|
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_DSI0>;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+&dsi1 {
|
|
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
|
|
|
|
+};
|
|
|
|
--- a/arch/arm/boot/dts/bcm283x.dtsi
|
|
|
|
+++ b/arch/arm/boot/dts/bcm283x.dtsi
|
2018-11-14 11:32:49 +00:00
|
|
|
@@ -98,10 +98,13 @@
|
2017-03-04 18:37:50 +00:00
|
|
|
#clock-cells = <1>;
|
|
|
|
reg = <0x7e101000 0x2000>;
|
|
|
|
|
|
|
|
- /* CPRMAN derives everything from the platform's
|
|
|
|
- * oscillator.
|
|
|
|
+ /* CPRMAN derives almost everything from the
|
|
|
|
+ * platform's oscillator. However, the DSI
|
|
|
|
+ * pixel clocks come from the DSI analog PHY.
|
|
|
|
*/
|
|
|
|
- clocks = <&clk_osc>;
|
|
|
|
+ clocks = <&clk_osc>,
|
|
|
|
+ <&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
|
|
|
|
+ <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
rng@7e104000 {
|
2018-11-14 11:32:49 +00:00
|
|
|
@@ -403,6 +406,26 @@
|
2017-03-22 22:35:39 +00:00
|
|
|
status = "disabled";
|
2017-03-04 18:37:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
+ dsi0: dsi@7e209000 {
|
|
|
|
+ compatible = "brcm,bcm2835-dsi0";
|
|
|
|
+ reg = <0x7e209000 0x78>;
|
|
|
|
+ interrupts = <2 4>;
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
+ #clock-cells = <1>;
|
|
|
|
+
|
|
|
|
+ clocks = <&clocks BCM2835_PLLA_DSI0>,
|
|
|
|
+ <&clocks BCM2835_CLOCK_DSI0E>,
|
|
|
|
+ <&clocks BCM2835_CLOCK_DSI0P>;
|
|
|
|
+ clock-names = "phy", "escape", "pixel";
|
|
|
|
+
|
|
|
|
+ clock-output-names = "dsi0_byte",
|
|
|
|
+ "dsi0_ddr2",
|
|
|
|
+ "dsi0_ddr";
|
|
|
|
+
|
|
|
|
+ status = "disabled";
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
aux: aux@0x7e215000 {
|
|
|
|
compatible = "brcm,bcm2835-aux";
|
|
|
|
#clock-cells = <1>;
|
2018-11-14 11:32:49 +00:00
|
|
|
@@ -462,6 +485,26 @@
|
2017-03-04 18:37:50 +00:00
|
|
|
interrupts = <2 1>;
|
|
|
|
};
|
|
|
|
|
|
|
|
+ dsi1: dsi@7e700000 {
|
|
|
|
+ compatible = "brcm,bcm2835-dsi1";
|
|
|
|
+ reg = <0x7e700000 0x8c>;
|
|
|
|
+ interrupts = <2 12>;
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
+ #clock-cells = <1>;
|
|
|
|
+
|
|
|
|
+ clocks = <&clocks BCM2835_PLLD_DSI1>,
|
|
|
|
+ <&clocks BCM2835_CLOCK_DSI1E>,
|
|
|
|
+ <&clocks BCM2835_CLOCK_DSI1P>;
|
|
|
|
+ clock-names = "phy", "escape", "pixel";
|
|
|
|
+
|
|
|
|
+ clock-output-names = "dsi1_byte",
|
|
|
|
+ "dsi1_ddr2",
|
|
|
|
+ "dsi1_ddr";
|
|
|
|
+
|
|
|
|
+ status = "disabled";
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
i2c1: i2c@7e804000 {
|
|
|
|
compatible = "brcm,bcm2835-i2c";
|
|
|
|
reg = <0x7e804000 0x1000>;
|