openwrt/target/linux/mpc85xx/patches-4.19/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch

From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Sun, 30 Dec 2018 23:24:41 +0100
Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT

This patch apply chages for OpenWRT in P2020RDB
dts file.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
 arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++---------
 1 file changed, 63 insertions(+), 35 deletions(-)

--- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
@@ -2,6 +2,7 @@
  * P2020 RDB Device Tree Source
  *
  * Copyright 2009-2012 Freescale Semiconductor Inc.
+ * Copyright 2018      Pawel Dembicki <paweldembicki@gmail.com>
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -9,10 +10,15 @@
  * option) any later version.
  */
 
+/dts-v1/;
+
 /include/ "p2020si-pre.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
 / {
-	model = "fsl,P2020RDB";
+	model = "Freescale P2020RDB";
 	compatible = "fsl,P2020RDB";
 
 	aliases {
@@ -38,48 +44,38 @@
 			  0x2 0x0 0x0 0xffb00000 0x00020000>;
 
 		nor@0,0 {
-			#address-cells = <1>;
-			#size-cells = <1>;
 			compatible = "cfi-flash";
 			reg = <0x0 0x0 0x1000000>;
 			bank-width = <2>;
 			device-width = <1>;
 
-			partition@0 {
-				/* This location must not be altered  */
-				/* 256KB for Vitesse 7385 Switch firmware */
-				reg = <0x0 0x00040000>;
-				label = "NOR (RO) Vitesse-7385 Firmware";
-				read-only;
-			};
-
-			partition@40000 {
-				/* 256KB for DTB Image */
-				reg = <0x00040000 0x00040000>;
-				label = "NOR (RO) DTB Image";
-				read-only;
-			};
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
 
-			partition@80000 {
-				/* 3.5 MB for Linux Kernel Image */
-				reg = <0x00080000 0x00380000>;
-				label = "NOR (RO) Linux Kernel Image";
-				read-only;
-			};
+				partition@0 {
+					/* This location must not be altered  */
+					/* 256KB for Vitesse 7385 Switch firmware */
+					reg = <0x0 0x00040000>;
+					label = "NOR (RO) Vitesse-7385 Firmware";
+					read-only;
+				};
 
-			partition@400000 {
-				/* 11MB for JFFS2 based Root file System */
-				reg = <0x00400000 0x00b00000>;
-				label = "NOR (RW) JFFS2 Root File System";
-			};
+				partition@40000 {
+					compatible = "denx,fit";
+					reg = <0x00040000 0x00ec0000>;
+					label = "firmware";
+				};
 
-			partition@f00000 {
-				/* This location must not be altered  */
-				/* 512KB for u-boot Bootloader Image */
-				/* 512KB for u-boot Environment Variables */
-				reg = <0x00f00000 0x00100000>;
-				label = "NOR (RO) U-Boot Image";
-				read-only;
+				partition@f00000 {
+					/* This location must not be altered  */
+					/* 512KB for u-boot Bootloader Image */
+					/* 512KB for u-boot Environment Variables */
+					reg = <0x00f00000 0x00100000>;
+					label = "u-boot";
+					read-only;
+				};
 			};
 		};
 
@@ -144,13 +140,43 @@
 	soc: soc@ffe00000 {
 		ranges = <0x0 0x0 0xffe00000 0x100000>;
 
+		gpio0: gpio-controller@fc00 {
+		};
+
 		i2c@3000 {
+			temperature-sensor@4c {
+				compatible = "adi,adt7461";
+				reg = <0x4c>;
+			};
+
+			eeprom@50 {
+				compatible = "atmel,24c256";
+				reg = <0x50>;
+			};
+
 			rtc@68 {
 				compatible = "dallas,ds1339";
 				reg = <0x68>;
 			};
 		};
 
+		i2c@3100 {
+			pmic@11 {
+				compatible = "zl2006";
+				reg = <0x11>;
+			};
+
+			gpio@18 {
+				compatible = "nxp,pca9557";
+				reg = <0x18>;
+			};
+
+			eeprom@52 {
+				compatible = "atmel,24c01";
+				reg = <0x52>;
+			};
+		};
+
 		spi@7000 {
 			flash@0 {
 				#address-cells = <1>;
@@ -204,10 +230,12 @@
 			phy0: ethernet-phy@0 {
 				interrupts = <3 1 0 0>;
 				reg = <0x0>;
+				reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
 			};
 			phy1: ethernet-phy@1 {
 				interrupts = <3 1 0 0>;
 				reg = <0x1>;
+				reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 			};
 			tbi-phy@2 {
 				device_type = "tbi-phy";