openwrt/target/linux/ipq806x/patches-5.15/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch

From 504188183408fac0f61b59f5ed8ea1773fe43669 Mon Sep 17 00:00:00 2001
From: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
Date: Wed, 15 Jun 2022 16:59:30 +0200
Subject: [PATCH 2/2] ARM: dts: qcom: add MDIO dedicated controller node for
 ipq806x

Add MDIO dedicated controller attached to gmac0 and fix rb3011 dts to
correctly use the new tag.

Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
---
 arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
 arch/arm/boot/dts/qcom-ipq8064.dtsi       |  14 +++
 2 files changed, 81 insertions(+), 67 deletions(-)

--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
@@ -24,73 +24,6 @@
 		device_type = "memory";
 	};
 
-	mdio0: mdio-0 {
-		status = "okay";
-		compatible = "virtual,mdio-gpio";
-		gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
-			<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		pinctrl-0 = <&mdio0_pins>;
-		pinctrl-names = "default";
-
-		switch0: switch@10 {
-			compatible = "qca,qca8337";
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			dsa,member = <0 0>;
-
-			pinctrl-0 = <&sw0_reset_pin>;
-			pinctrl-names = "default";
-
-			reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
-			reg = <0x10>;
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				switch0cpu: port@0 {
-					reg = <0>;
-					label = "cpu";
-					ethernet = <&gmac0>;
-					phy-mode = "rgmii-id";
-					fixed-link {
-						speed = <1000>;
-						full-duplex;
-					};
-				};
-
-				port@1 {
-					reg = <1>;
-					label = "sw1";
-				};
-
-				port@2 {
-					reg = <2>;
-					label = "sw2";
-				};
-
-				port@3 {
-					reg = <3>;
-					label = "sw3";
-				};
-
-				port@4 {
-					reg = <4>;
-					label = "sw4";
-				};
-
-				port@5 {
-					reg = <5>;
-					label = "sw5";
-				};
-			};
-		};
-	};
-
 	mdio1: mdio-1 {
 		status = "okay";
 		compatible = "virtual,mdio-gpio";
@@ -220,6 +153,73 @@
 	status = "okay";
 };
 
+&mdio0 {
+	status = "okay";
+	compatible = "virtual,mdio-gpio";
+	gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
+		<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	pinctrl-0 = <&mdio0_pins>;
+	pinctrl-names = "default";
+
+	switch0: switch@10 {
+		compatible = "qca,qca8337";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		dsa,member = <0 0>;
+
+		pinctrl-0 = <&sw0_reset_pin>;
+		pinctrl-names = "default";
+
+		reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+		reg = <0x10>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			switch0cpu: port@0 {
+				reg = <0>;
+				label = "cpu";
+				ethernet = <&gmac0>;
+				phy-mode = "rgmii-id";
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				label = "sw1";
+			};
+
+			port@2 {
+				reg = <2>;
+				label = "sw2";
+			};
+
+			port@3 {
+				reg = <3>;
+				label = "sw3";
+			};
+
+			port@4 {
+				reg = <4>;
+				label = "sw4";
+			};
+
+			port@5 {
+				reg = <5>;
+				label = "sw5";
+			};
+		};
+	};
+};
+
 &gmac0 {
 	status = "okay";
 
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1446,6 +1446,20 @@
 			};
 		};
 
+		mdio0: mdio@37000000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			compatible = "qcom,ipq8064-mdio", "syscon";
+			reg = <0x37000000 0x200000>;
+			resets = <&gcc GMAC_CORE1_RESET>;
+			reset-names = "stmmaceth";
+			clocks = <&gcc GMAC_CORE1_CLK>;
+			clock-names = "stmmaceth";
+
+			status = "disabled";
+		};
+
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
 			regulator-name = "SDCC Power";