openwrt/target/linux/ramips/dts/ArcherC50V3.dts

96 lines
1.6 KiB
Plaintext
Raw Normal View History

/dts-v1/;
#include "TPLINK-8M.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,c50-v3", "mediatek,mt7628an-soc";
model = "TP-Link Archer C50 v3";
aliases {
led-status = &led_power;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
gpio-leds {
compatible = "gpio-leds";
lan {
label = "c50-v3:green:lan";
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
};
led_power: power {
label = "c50-v3:green:power";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
wan {
label = "c50-v3:green:wan";
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
};
wan_orange {
label = "c50-v3:orange:wan";
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
};
wlan {
label = "c50-v3:green:wlan2g";
gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
};
wlan5 {
label = "c50-v3:green:wlan5g";
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
};
wps {
label = "c50-v3:green:wps";
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "i2c", "gpio", "p0led_an", "p1led_an", "p2led_an",
"p3led_an", "p4led_an", "wdt", "wled_an";
ralink,function = "gpio";
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
};