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57 lines
1.9 KiB
Diff
57 lines
1.9 KiB
Diff
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From b1ae3587d16a8c8fc9453e147c8708d6f006ffbb Mon Sep 17 00:00:00 2001
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From: Bjarni Jonasson <bjarni.jonasson@microchip.com>
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Date: Wed, 13 Jan 2021 12:56:25 +0100
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Subject: [PATCH] net: phy: Add 100 base-x mode
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Sparx-5 supports this mode and it is missing in the PHY core.
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Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com>
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Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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Documentation/networking/phy.rst | 5 +++++
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include/linux/phy.h | 4 ++++
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2 files changed, 9 insertions(+)
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--- a/Documentation/networking/phy.rst
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+++ b/Documentation/networking/phy.rst
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@@ -286,6 +286,11 @@ Some of the interface modes are describe
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Note: due to legacy usage, some 10GBASE-R usage incorrectly makes
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use of this definition.
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+``PHY_INTERFACE_MODE_100BASEX``
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+ This defines IEEE 802.3 Clause 24. The link operates at a fixed data
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+ rate of 125Mpbs using a 4B/5B encoding scheme, resulting in an underlying
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+ data rate of 100Mpbs.
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+
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Pause frames / flow control
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===========================
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--- a/include/linux/phy.h
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+++ b/include/linux/phy.h
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@@ -104,6 +104,7 @@ extern const int phy_10gbit_features_arr
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* @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
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* @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
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* @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
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+ * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
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* @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
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* @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
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* @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
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@@ -135,6 +136,7 @@ typedef enum {
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PHY_INTERFACE_MODE_MOCA,
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PHY_INTERFACE_MODE_QSGMII,
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PHY_INTERFACE_MODE_TRGMII,
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+ PHY_INTERFACE_MODE_100BASEX,
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PHY_INTERFACE_MODE_1000BASEX,
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PHY_INTERFACE_MODE_2500BASEX,
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PHY_INTERFACE_MODE_RXAUI,
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@@ -217,6 +219,8 @@ static inline const char *phy_modes(phy_
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return "usxgmii";
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case PHY_INTERFACE_MODE_10GKR:
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return "10gbase-kr";
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+ case PHY_INTERFACE_MODE_100BASEX:
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+ return "100base-x";
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default:
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return "unknown";
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}
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