openwrt/target/linux/ramips/dts/mt7620a_sanlinking_d240.dts

// SPDX-License-Identifier: BSD-3-Clause
/*
 *  Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
 *  All rights reserved.
 */

#include "mt7620a.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "sanlinking,d240", "ralink,mt7620a-soc";
	model = "Sanlinking Technologies D240";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	gpio-export {
		compatible = "gpio-export";
		#size-cells = <0>;

		power_mpcie2 {
			gpio-export,name = "power_mpcie2";
			gpio-export,output = <1>;
			gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
		};

		power_mpcie1 {
			gpio-export,name = "power_mpcie1";
			gpio-export,output = <1>;
			gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power: power {
			label = "blue:power";
			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
		};

		usb {
			label = "blue:usb";
			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
			trigger-sources = <&ohci_port1>, <&ehci_port1>;
			linux,default-trigger = "usbport";
		};

		air {
			label = "blue:wifi";
			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	status = "okay";
};

&gpio3 {
	status = "okay";
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_factory_0: eeprom@0 {
						reg = <0x0 0x200>;
					};

					macaddr_factory_4: macaddr@4 {
						reg = <0x4 0x6>;
					};
				};
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0xfb0000>;
			};
		};
	};
};

&sdhci {
	status = "okay";
	/* the pins function is already set during pinmux driver load */
	/delete-property/ pinctrl-0;
};

&ehci {
	status = "okay";
};

&ohci {
	status = "okay";
};

&ethernet {
	nvmem-cells = <&macaddr_factory_4>;
	nvmem-cell-names = "mac-address";

	mediatek,portmap = "llllw";
};

&wmac {
	nvmem-cells = <&eeprom_factory_0>;
	nvmem-cell-names = "eeprom";
};

&state_default {
	default {
		groups = "i2c", "uartf", "wled", "spi refclk", "pa";
		function = "gpio";
	};

	/*
	 * The sd function of the nd_sd group configures two of the
	 * groups pins as gpios. The pins are used as PCIe reset/power.
	 * Due to the driver load order, the pins are configured way to
	 * late if triggered by the sd-card driver.
	 * To not introduce another kind of driver load order
	 * dependency and configure the pins as early as possible,
	 * means during pinmux driver load.
	 */
	gpio_sd {
		groups = "nd_sd";
		function = "sd";
	};
};

&pcie {
	status = "okay";
};