openwrt/target/linux/mediatek/dts/mt7986a-ruijie-rg-x60-pro.dts

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mediatek: add support for Ruijie RG-X60 Pro This pull request ports Ruijie RG-X60 Pro router support to the main branch. Parameters: - SoC : MediaTek MT7986A Quad-core ARM Cortex-A53 2.0GHz - RAM : DDR3 512MiB (W634GU6QB) - Flash : SPI-NAND 128 MiB (W25N01GVZEIG) - WLAN : MediaTek MT7986A integration dual-band WiFi 6 - 2.4 GHz : b/g/n/ax, MIMO 4x4 - 5 GHz : a/n/ac/ax, MIMO 4x4 - Ethernet : 10/100/1000 Mbps x4 (MediaTek MT7531AE) 2500Mbps x 1 (Realtek RTL8221B-VB-CG) - UART : through-hole on PCB - [J500] GND, TX, RX, 3.3V (115200n1) - Buttons : Mesh, Reset - LEDs : 1x Power (Blue) 1x Turbo (Purple) - Power : 12 VDC, 3 A How to Installation: 1. Remove the case and connect the TTL cable to the corresponding position. 2. Power on the device and quickly press "down" on the keyboard, then U-Boot will stay in the menu. 3. Select "1. Upgrade Firmware", select "0. TFTP Client(Default)". 4. Input the IP address, input the Openwrt image file name to be flashed, start the TFTP server, and press "Enter". 5. Wait for the flashing to complete. How return to stock: 1. Remove the case and connect the TTL cable to the corresponding position. 2. Power on the device and quickly press "down" on the keyboard, then U-Boot will stay in the menu. 3. Select "1. Upgrade Firmware", select "0. TFTP Client(Default)". 4. Input the IP address, input the Stock “E-WEBOS” image file name to be flashed, start the TFTP server, and press "Enter". 5. Wait for the flashing to complete. About recovery: Connect uart, use u-boot menu to flash stock firmware image or boot OpenWrt initramfs image. About MAC Address: +---------+-------------------+-----------+ | | MAC | Algorithm | +---------+-------------------+-----------+ | WAN | 10:82:3D:XX:XX:9E | label | | LAN | 10:82:3D:XX:XX:9F | label+1 | | WLAN 2g | 10:82:3D:XX:XX:A0 | label+2 | | WLAN 5g | 10:82:3D:XX:XX:A1 | label+3 | +---------+-------------------+-----------+ Signed-off-by: Ashley Lee <code@emtips.net>
2023-12-30 14:54:54 +00:00
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "mt7986a.dtsi"
/ {
compatible = "ruijie,rg-x60-pro", "mediatek,mt7986a";
model = "Ruijie RG-X60 Pro";
aliases {
serial0 = &uart0;
led-boot = &led_system;
led-failsafe = &led_alarm;
led-running = &led_system;
led-upgrade = &led_alarm;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x11002000";
};
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-0 {
label = "reset";
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
button-1 {
label = "mesh";
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
};
};
leds-gpio {
compatible = "gpio-leds";
led_system: led-0 {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 22 GPIO_ACTIVE_LOW>;
};
led_alarm: led-1 {
color = <LED_COLOR_ID_PURPLE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-handle = <&phy7>;
phy-mode = "2500base-x";
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&mdio {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
};
phy7: phy@7 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <7>;
reset-assert-us = <100000>;
reset-deassert-us = <100000>;
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
realtek,aldps-enable;
};
};
&pio {
spi_flash_pins: spi-flash-pins-33-to-38 {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
status = "okay";
flash@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <20000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x000000 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "product_info";
reg = <0x580000 0x80000>;
read-only;
};
partition@600000 {
label = "kdump";
reg = <0x600000 0x80000>;
read-only;
};
partition@680000 {
label = "ubi";
reg = <0x680000 0x3f00000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&wifi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wf_2g_5g_pins>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};