openwrt/target/linux/realtek/dts-5.10/rtl930x.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	compatible = "realtek,rtl838x-soc";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		frequency = <800000000>;

		cpu@0 {
			compatible = "mips,mips34Kc";
			reg = <0>;
		};
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x8000000>;
	};

	chosen {
		bootargs = "console=ttyS0,38400";
	};

	cpuintc: cpuintc {
		compatible = "mti,cpu-interrupt-controller";
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
	};

	lx_clk: lx_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency  = <175000000>;
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x18000000 0x10000>;

		intc: interrupt-controller@3000 {
			compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
			reg = <0x3000 0x18>, <0x3018 0x18>;
			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&cpuintc>;
			interrupts = <2>, <3>, <4>, <5>, <6>, <7>;
		};

		rtl9300clock: rtl9300clock@3200 {
			compatible = "realtek,rtl9300clock";
			reg = <0xb8003200 0x10>;
			#address-cells = <0>;
			#interrupt-cells = <1>;

			interrupt-parent = <&intc>;
			interrupts = <7 1>, <8 2>;
		};

		spi0: spi@1200 {
			compatible = "realtek,rtl8380-spi";
			reg = <0x1200 0x100>;

			#address-cells = <1>;
			#size-cells = <0>;
		};

		uart0: uart@2000 {
			compatible = "ns16550a";
			reg = <0x2000 0x100>;

			clocks = <&lx_clk>;

			interrupt-parent = <&intc>;
			interrupts = <30 1>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;
		};

		uart1: uart@2100 {
			compatible = "ns16550a";
			reg = <0x2100 0x100>;

			clocks = <&lx_clk>;

			interrupt-parent = <&intc>;
			interrupts = <31 0>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;

			status = "disabled";
		};

		watchdog0: watchdog@3260 {
			compatible = "realtek,rtl9300-wdt";
			reg = <0x3260 0xc>;

			realtek,reset-mode = "soc";

			clocks = <&lx_clk>;
			timeout-sec = <30>;

			interrupt-parent = <&intc>;
			interrupt-names = "phase1", "phase2";
			interrupts = <5 4>, <6 4>;
		};

		gpio0: gpio-controller@3300 {
			compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";
			reg = <0x3300 0x1c>, <0x3338 0x8>;

			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <24>;

			interrupt-controller;
			#interrupt-cells = <2>;
			interrupt-parent = <&intc>;
			interrupts = <13 1>;
		};

	};

	ethernet0: ethernet@1b00a300 {
		compatible = "realtek,rtl838x-eth";
		reg = <0x1b00a300 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <24 3>;

		phy-mode = "internal";

		fixed-link {
			speed = <1000>;
			full-duplex;
		};
	};

	switch0: switch@1b000000 {
		compatible = "realtek,rtl83xx-switch";
		status = "okay";

		interrupt-parent = <&intc>;
		interrupts = <23 2>;
	};
};