2022-10-18 20:26:34 +00:00
|
|
|
From 5f008cb22f60da4e10375f22266c1a4e20b1252e Mon Sep 17 00:00:00 2001
|
|
|
|
|
From: Alex Marginean <alexandru.marginean@nxp.com>
|
|
|
|
|
Date: Fri, 20 Sep 2019 18:22:52 +0300
|
|
|
|
|
Subject: [PATCH] drivers: net: phy: aquantia: fix system side protocol
|
|
|
|
|
misconfiguration
|
|
|
|
|
|
|
|
|
|
Do not set up protocols for speeds that are not supported by FW. Enabling
|
|
|
|
|
these protocols leads to link issues on system side.
|
|
|
|
|
|
|
|
|
|
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
|
|
|
|
|
---
|
2023-11-19 11:52:55 +00:00
|
|
|
drivers/net/phy/aquantia/aquantia_main.c | 8 +++++++-
|
2022-10-18 20:26:34 +00:00
|
|
|
1 file changed, 7 insertions(+), 1 deletion(-)
|
|
|
|
|
|
2023-11-19 11:52:55 +00:00
|
|
|
--- a/drivers/net/phy/aquantia/aquantia_main.c
|
|
|
|
|
+++ b/drivers/net/phy/aquantia/aquantia_main.c
|
|
|
|
|
@@ -285,10 +285,16 @@ static int aqr_config_aneg_set_prot(stru
|
2022-10-18 20:26:34 +00:00
|
|
|
phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
|
|
|
|
|
aquantia_syscfg[if_type].start_rate);
|
|
|
|
|
|
|
|
|
|
- for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++)
|
|
|
|
|
+ for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++) {
|
|
|
|
|
+ u16 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1,
|
|
|
|
|
+ AQUANTIA_VND1_GSYSCFG_BASE + i);
|
|
|
|
|
+ if (!reg)
|
|
|
|
|
+ continue;
|
|
|
|
|
+
|
|
|
|
|
phy_write_mmd(phydev, MDIO_MMD_VEND1,
|
|
|
|
|
AQUANTIA_VND1_GSYSCFG_BASE + i,
|
|
|
|
|
aquantia_syscfg[if_type].syscfg);
|
|
|
|
|
+ }
|
|
|
|
|
|
|
|
|
|
/* wake PHY back up */
|
|
|
|
|
phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0);
|
