openwrt/target/linux/ath79/dts/qca9550_huawei_ap5030dn.dts

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ath79: add support for Huawei AP5030DN Huawei AP5030DN is a dual-band, dual-radio 802.11ac Wave 1 3x3 MIMO enterprise access point with two Gigabit Ethernet ports and PoE support. Hardware highlights: - CPU: QCA9550 SoC at 720MHz - RAM: 256MB DDR2 - Flash: 32MB SPI-NOR - Wi-Fi 2.4GHz: QCA9550-internal radio - Wi-Fi 5GHz: QCA9880 PCIe WLAN SoC - Ethernet 1: 10/100/1000 Mbps Ethernet through Broadcom B50612E PHY - Ethernet 2: 10/100/1000 Mbps Ethernet through Marvell 88E1510 PHY - PoE: input through Ethernet 1 port - Standalone 12V/2A power input - Serial console externally available through RJ45 port - External watchdog: SGM706 (1.6s timeout) Serial console: 9600n8 (9600 baud, no stop bits, no parity, 8 data bits) MAC addresses: Each device has 32 consecutive MAC addresses allocated by the vendor, which don't overlap between devices. This was confirmed with multiple devices with consecutive serial numbers. The MAC address range starts with the address on the label. To be able to distinguish between the interfaces, the following MAC address scheme is used: - eth0 = label MAC - eth1 = label MAC + 1 - radio0 (Wi-Fi 5GHz) = label MAC + 2 - radio1 (Wi-Fi 2.4GHz) = label MAC + 3 Installation: 0. Connect some sort of RJ45-to-USB adapter to "Console" port of the AP 1. Power up the AP 2. At prompt "Press f or F to stop Auto-Boot in 3 seconds", do what they say. Log in with default admin password "admin@huawei.com". 3. Boot the OpenWrt initramfs from TFTP using the hidden script "run ramboot". Replace IP address as needed: > setenv serverip 192.168.1.10 > setenv ipaddr 192.168.1.1 > setenv rambootfile openwrt-ath79-generic-huawei_ap5030dn-initramfs-kernel.bin > saveenv > run ramboot 4. Optional but recommended as the factory firmware cannot be downloaded publicly: Back up contents of "firmware" partition using the web interface or ssh: $ ssh root@192.168.1.1 cat /dev/mtd11 > huawei_ap5030dn_fw_backup.bin 5. Run sysupgrade using sysupgrade image. OpenWrt shall boot from flash afterwards. Return to factory firmware (using firmware upgrade package downloaded from non-public Huawei website): 1. Start a TFTP server in the directory where the firmware upgrade package is located 2. Boot to u-boot as described above 3. Install firmware upgrade package and format the config partitions: > update system FatAP5X30XN_SOMEVERSION.bin > format_fs Return to factory firmware (from previously created backup): 1. Copy over the firmware partition backup to /tmp, for example using scp 2. Use sysupgrade with force to restore the backup: sysupgrade -F huawei_ap5030dn_fw_backup.bin 3. Boot AP to U-Boot as described above Quirks and known issues ----------------------- - On initial power-up, the Huawei-modified bootloader suspends both ethernet PHYs (it sets the "Power Down" bit in the MII control register). Unfortunately, at the time of the initial port, the kernel driver for the B50612E/BCM54612E PHY behind eth0 doesn't have a resume callback defined which would clear this bit. This makes the PHY unusable since it remains suspended forever. This is why the backported kernel patches in this commit are required which add this callback and for completeness also a suspend callback. - The stock firmware has a semi dual boot concept where the primary kernel uses a squashfs as root partition and the secondary kernel uses an initramfs. This dual boot concept is circumvented on purpose to gain more flash space and since the stock firmware's flash layout isn't compatible with mtdsplit. - The external watchdog's timeout of 1.6s is very hard to satisfy during bootup. This is why the GPIO15 pin connected to the watchdog input is configured directly in the LZMA loader to output the CPU_CLK/4 signal which keeps the watchdog happy until the wdt-gpio kernel driver takes over. Because it would also take too long to read the whole kernel image from flash, the uImage header only includes the loader which then reads the kernel image from flash after GPIO15 is configured. Signed-off-by: Marco von Rosenberg <marcovr@selfnet.de> [fixed 6.6 backport patch naming] Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 06cdc07f8cc703ef7dcb3e7b329b9abff0806a6e)
2024-03-31 15:07:39 +00:00
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Huawei AP5030DN";
compatible = "huawei,ap5030dn", "qca,qca9550", "qca,qca9558";
chosen {
bootargs = "console=ttyS0,9600n8";
};
aliases {
led-boot = &led_function_red;
led-failsafe = &led_function_red;
led-running = &led_function_green;
led-upgrade = &led_function_red;
};
leds {
compatible = "gpio-leds";
led_function_green: led-status-red {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
};
led_function_red: led-status-green {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
restart {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
watchdog {
pinctrl-names = "default";
pinctrl-0 = <&wdt_gpio15>;
compatible = "linux,wdt-gpio";
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
hw_margin_ms = <100>;
always-running;
};
virtual_flash {
compatible = "mtd-concat";
devices = <&fwconcat0 &fwconcat1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "firmware";
reg = <0x0 0x1e00000>;
compatible = "openwrt,uimage", "denx,uimage";
};
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot-a";
reg = <0x0 0x80000>;
read-only;
};
// The BootupA/B partitions store the addresses
// of the main and backup kernel in flash (which is the same here).
// During sysupgrade, these addresses are set to the start of the
// "firmware" partition.
partition@80000 {
label = "BootupA";
reg = <0x80000 0x20000>;
};
partition@a0000 {
label = "BootupB";
reg = <0xa0000 0x20000>;
};
partition@c0000 {
label = "u-boot-env";
reg = <0xc0000 0x20000>;
read-only;
};
partition@e0000 {
label = "BoardData";
reg = <0xe0000 0x20000>;
read-only;
};
// In the vendor layout, there are the "SysImageA" (12 MiB)
// and the "ConfigA" (3 MiB) partitions here.
fwconcat0: partition@100000 {
label = "fwconcat0";
reg = <0x100000 0xF00000>;
};
partition@1000000 {
label = "u-boot-b";
reg = <0x1000000 0x80000>;
read-only;
};
partition@1080000 {
label = "ResultA";
reg = <0x1080000 0x20000>;
read-only;
};
partition@10a0000 {
label = "ResultB";
reg = <0x10a0000 0x20000>;
read-only;
};
// In the vendor layout, there are the "SysImageB" (12 MiB)
// and the "ConfigB" (3 MiB) partitions here.
fwconcat1: partition@10c0000 {
label = "fwconcat1";
reg = <0x10c0000 0xF00000>;
};
art: partition@1fc0000 {
label = "art";
reg = <0x1fc0000 0x40000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_2005b: macaddr@2005b {
compatible = "mac-base";
reg = <0x2005b 0x6>;
#nvmem-cell-cells = <1>;
};
cal_art_1000: cal@1000 {
reg = <0x1000 0x440>;
};
cal_art_5000: cal@5000 {
reg = <0x5000 0x844>;
};
};
};
};
};
};
&wmac {
status = "okay";
nvmem-cells = <&macaddr_art_2005b 3>, <&cal_art_1000>;
nvmem-cell-names = "mac-address", "calibration";
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&macaddr_art_2005b 2>, <&cal_art_5000>;
nvmem-cell-names = "mac-address", "calibration";
};
};
&eth0 {
status = "okay";
nvmem-cells = <&macaddr_art_2005b 0>;
nvmem-cell-names = "mac-address";
pll-data = <0xa6000000 0xa0000101 0xa0001313>;
phy-handle = <&phy0>;
gmac-config {
device = <&gmac>;
rxdv-delay = <3>;
rxd-delay = <3>;
txen-delay = <0>;
txd-delay = <0>;
};
};
&eth1 {
status = "okay";
nvmem-cells = <&macaddr_art_2005b 1>;
nvmem-cell-names = "mac-address";
pll-data = <0x03000101 0x00000101 0x00001313>;
phy-handle = <&phy1>;
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@18 {
reg = <0x18>;
};
};
&mdio1 {
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&pinmux {
wdt_gpio15: pinmux_wdt_gpio15 {
pinctrl-single,bits = <0xc 0x0 0xFF000000>;
};
};
&wdt {
status = "disabled";
};