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34 lines
1.6 KiB
Diff
34 lines
1.6 KiB
Diff
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From 13ad5ccc093ff448b99ac7e138e91e78796adb48 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Thu, 14 Oct 2021 00:39:12 +0200
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Subject: dt-bindings: net: dsa: qca8k: Document qca,sgmii-enable-pll
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Document qca,sgmii-enable-pll binding used in the CPU nodes to
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enable SGMII PLL on MAC config.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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Documentation/devicetree/bindings/net/dsa/qca8k.txt | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
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+++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
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@@ -45,6 +45,16 @@ A CPU port node has the following option
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Mostly used in qca8327 with CPU port 0 set to
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sgmii.
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- qca,sgmii-txclk-falling-edge: Set the transmit clock phase to falling edge.
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+- qca,sgmii-enable-pll : For SGMII CPU port, explicitly enable PLL, TX and RX
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+ chain along with Signal Detection.
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+ This should NOT be enabled for qca8327. If enabled with
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+ qca8327 the sgmii port won't correctly init and an err
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+ is printed.
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+ This can be required for qca8337 switch with revision 2.
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+ A warning is displayed when used with revision greater
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+ 2.
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+ With CPU port set to sgmii and qca8337 it is advised
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+ to set this unless a communication problem is observed.
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For QCA8K the 'fixed-link' sub-node supports only the following properties:
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