2022-05-20 12:27:22 +00:00
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--- a/arch/mips/bcm63xx/clk.c
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+++ b/arch/mips/bcm63xx/clk.c
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@@ -430,6 +430,23 @@ static struct clk clk_pcie = {
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};
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/*
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+ * NAND clock
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+ */
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+static void nand_set(struct clk *clk, int enable)
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+{
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+ if (BCMCPU_IS_6362())
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+ bcm_hwclock_set(CKCTL_6362_NAND_EN, enable);
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+ else if (BCMCPU_IS_6368())
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+ bcm_hwclock_set(CKCTL_6368_NAND_EN, enable);
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+ else if (BCMCPU_IS_63268())
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+ bcm_hwclock_set(CKCTL_63268_NAND_EN, enable);
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+}
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+
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+static struct clk clk_nand = {
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+ .set = nand_set,
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+};
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+
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+/*
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* Internal peripheral clock
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*/
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static struct clk clk_periph = {
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2022-12-31 15:29:53 +00:00
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@@ -626,6 +643,7 @@ static struct clk_lookup bcm6362_clks[]
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2022-05-20 12:27:22 +00:00
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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+ CLKDEV_INIT(NULL, "nand", &clk_nand),
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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CLKDEV_INIT(NULL, "usbd", &clk_usbd),
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2022-12-31 15:29:53 +00:00
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@@ -643,6 +661,7 @@ static struct clk_lookup bcm6368_clks[]
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2022-05-20 12:27:22 +00:00
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CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
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CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
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/* gated clocks */
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+ CLKDEV_INIT(NULL, "nand", &clk_nand),
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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CLKDEV_INIT(NULL, "usbd", &clk_usbd),
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2022-12-31 15:29:53 +00:00
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@@ -661,6 +680,7 @@ static struct clk_lookup bcm63268_clks[]
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2022-05-20 12:27:22 +00:00
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CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
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CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
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/* gated clocks */
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+ CLKDEV_INIT(NULL, "nand", &clk_nand),
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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CLKDEV_INIT(NULL, "usbd", &clk_usbd),
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