2024-03-07 06:19:08 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7981.dtsi"
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/ {
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model = "OpenEmbed SOM7981";
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compatible = "openembed,som7981", "mediatek,mt7981";
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aliases {
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2024-10-16 08:05:40 +00:00
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led-boot = &act_led;
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led-failsafe = &act_led;
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led-running = &act_led;
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led-upgrade = &act_led;
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2024-03-07 06:19:08 +00:00
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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reg = <0 0x40000000 0 0x40000000>;
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};
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2024-10-16 08:05:40 +00:00
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beeper {
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compatible = "gpio-beeper";
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gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
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};
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2024-03-07 06:19:08 +00:00
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_LAN;
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2024-10-16 08:05:40 +00:00
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color = <LED_COLOR_ID_GREEN>;
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2024-03-07 06:19:08 +00:00
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gpios = <&pio 8 GPIO_ACTIVE_LOW>;
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};
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led-1 {
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function = LED_FUNCTION_LAN;
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2024-10-16 08:05:40 +00:00
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color = <LED_COLOR_ID_AMBER>;
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2024-03-07 06:19:08 +00:00
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gpios = <&pio 13 GPIO_ACTIVE_LOW>;
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};
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2024-10-16 08:05:40 +00:00
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led-2 {
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function = LED_FUNCTION_PANIC;
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color = <LED_COLOR_ID_GREEN>;
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2024-03-07 06:19:08 +00:00
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gpios = <&pio 34 GPIO_ACTIVE_LOW>;
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2024-10-16 08:05:40 +00:00
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panic-indicator;
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2024-03-07 06:19:08 +00:00
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};
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2024-10-16 08:05:40 +00:00
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act_led: led-3 {
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function = LED_FUNCTION_ACTIVITY;
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2024-03-07 06:19:08 +00:00
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color = <LED_COLOR_ID_RED>;
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gpios = <&pio 35 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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phy-handle = <&phy0>;
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nvmem-cells = <&macaddr_factory_a 0>;
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nvmem-cell-names = "mac-address";
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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nvmem-cells = <&macaddr_factory_a 1>;
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nvmem-cell-names = "mac-address";
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};
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};
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2024-10-16 08:05:40 +00:00
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&i2c0 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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eeprom@50 {
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compatible = "atmel,24c64";
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reg = <0x50>;
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page-size = <32>;
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};
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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#clock-cells = <0>;
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};
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crypto@60 {
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compatible = "atmel,atecc508a";
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reg = <0x60>;
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};
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};
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2024-03-07 06:19:08 +00:00
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&mdio_bus {
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phy0: ethernet-phy@5 {
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reg = <5>;
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compatible = "ethernet-phy-ieee802.3-c45";
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phy-mode = "2500base-x";
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reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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2024-10-16 08:05:40 +00:00
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reset-assert-us = <15000>;
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reset-deassert-us = <68000>;
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2024-03-07 06:19:08 +00:00
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realtek,aldps-enable;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand: flash@0 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x000000 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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partition@180000 {
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compatible = "nvmem-cells";
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label = "factory";
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reg = <0x180000 0x100000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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macaddr_factory_a: macaddr@a {
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compatible = "mac-base";
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reg = <0xa 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@280000 {
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label = "config";
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reg = <0x280000 0x100000>;
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read-only;
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};
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partition@380000 {
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label = "fip";
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reg = <0x380000 0x200000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0xf880000>;
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};
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};
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};
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};
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&pio {
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i2c0_pins: i2c0-pins {
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mux {
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function = "i2c";
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groups = "i2c0_1";
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};
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};
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2024-03-07 06:19:08 +00:00
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <8>;
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mediatek,pull-down-adv = <0>;
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};
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};
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2024-10-16 08:05:40 +00:00
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uart1_pins: uart1-pins {
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mux {
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function = "uart";
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groups = "uart1_3";
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};
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};
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uart2_pins: uart2-pins {
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mux {
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function = "uart";
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groups = "uart2_0_tx_rx";
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};
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};
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wwan_rst_h: wwan-rst-h {
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pins = "GPIO_WPS";
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drive-strength = <8>;
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mediatek,pull-down-adv = <0>;
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output-low;
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};
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2024-03-07 06:19:08 +00:00
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};
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&uart0 {
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status = "okay";
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};
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2024-10-16 08:05:40 +00:00
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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2024-03-07 06:19:08 +00:00
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&usb_phy {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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status = "okay";
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2024-10-16 08:05:40 +00:00
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band@1 {
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reg = <1>;
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nvmem-cells = <&macaddr_factory_a 0>;
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nvmem-cell-names = "mac-address";
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};
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2024-03-07 06:19:08 +00:00
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};
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&xhci {
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2024-10-16 08:05:40 +00:00
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pinctrl-names = "default";
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pinctrl-0 = <&wwan_rst_h>;
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2024-03-07 06:19:08 +00:00
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status = "okay";
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};
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