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47 lines
2.0 KiB
Diff
47 lines
2.0 KiB
Diff
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From 60b78d28057f9f1ecce39955755d26e4cd3130de Mon Sep 17 00:00:00 2001
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From: Lior Amsalem <alior@marvell.com>
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Date: Mon, 25 Nov 2013 17:26:44 +0100
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Subject: [PATCH 085/203] irqchip: armada-370-xp: fix IPI race condition
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In the Armada 370/XP driver, when we receive an IRQ 0, we read the
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list of doorbells that caused the interrupt from register
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS. This gives the list of IPIs that
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were generated. However, instead of acknowledging only the IPIs that
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were generated, we acknowledge *all* the IPIs, by writing
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~IPI_DOORBELL_MASK in the ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS register.
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This creates a race condition: if a new IPI that isn't part of the
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ones read into the temporary "ipimask" variable is fired before we
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acknowledge all IPIs, then we will simply loose it. This is causing
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scheduling hangs on SMP intensive workloads.
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It is important to mention that this ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS
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register has the following behavior: "A CPU write of 0 clears the bits
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in this field. A CPU write of 1 has no effect". This is what allows us
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to simply write ~ipimask to acknoledge the handled IPIs.
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Notice that the same problem is present in the MSI implementation, but
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it will be fixed as a separate patch, so that this IPI fix can be
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pushed to older stable versions as appropriate (all the way to 3.8),
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while the MSI code only appeared in 3.13.
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Signed-off-by: Lior Amsalem <alior@marvell.com>
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Cc: stable@vger.kernel.org
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Cc: Thomas Gleixner <tglx@linutronix.de>
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---
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drivers/irqchip/irq-armada-370-xp.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/irqchip/irq-armada-370-xp.c
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+++ b/drivers/irqchip/irq-armada-370-xp.c
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@@ -407,7 +407,7 @@ armada_370_xp_handle_irq(struct pt_regs
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS)
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& IPI_DOORBELL_MASK;
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- writel(~IPI_DOORBELL_MASK, per_cpu_int_base +
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+ writel(~ipimask, per_cpu_int_base +
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ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
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/* Handle all pending doorbells */
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