2022-01-10 01:12:45 +00:00
|
|
|
From 735a4ac9782b96fbe1543c578aa8334364f21abd Mon Sep 17 00:00:00 2001
|
|
|
|
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
|
|
|
|
Date: Fri, 2 Apr 2021 14:05:24 +0200
|
|
|
|
Subject: [PATCH] PCI: aardvark: Enable MSI-X support
|
|
|
|
MIME-Version: 1.0
|
|
|
|
Content-Type: text/plain; charset=UTF-8
|
|
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
|
|
|
|
According to PCI 3.0 specification, sending both MSI and MSI-X interrupts
|
|
|
|
is done by DWORD memory write operation to doorbell message address. The
|
|
|
|
write operation for MSI has zero upper 16 bits and the MSI interrupt number
|
|
|
|
in the lower 16 bits, while the write operation for MSI-X contains a 32-bit
|
|
|
|
value from MSI-X table.
|
|
|
|
|
|
|
|
Since the driver only uses interrupt numbers from range 0..31, the upper
|
|
|
|
16 bits of the DWORD memory write operation to doorbell message address
|
|
|
|
are zero even for MSI-X interrupts. Thus we can enable MSI-X interrupts.
|
|
|
|
|
|
|
|
Testing proves that kernel can correctly receive MSI-X interrupts from PCIe
|
|
|
|
cards which supports both MSI and MSI-X interrupts.
|
|
|
|
|
|
|
|
Signed-off-by: Pali Rohár <pali@kernel.org>
|
|
|
|
Signed-off-by: Marek Behún <kabel@kernel.org>
|
|
|
|
---
|
|
|
|
drivers/pci/controller/pci-aardvark.c | 2 +-
|
|
|
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
|
|
|
|
|
|
|
--- a/drivers/pci/controller/pci-aardvark.c
|
|
|
|
+++ b/drivers/pci/controller/pci-aardvark.c
|
2022-01-27 12:08:41 +00:00
|
|
|
@@ -1344,7 +1344,7 @@ static struct irq_chip advk_msi_irq_chip
|
2022-01-10 01:12:45 +00:00
|
|
|
|
|
|
|
static struct msi_domain_info advk_msi_domain_info = {
|
|
|
|
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
|
|
|
|
- MSI_FLAG_MULTI_PCI_MSI,
|
|
|
|
+ MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
|
|
|
|
.chip = &advk_msi_irq_chip,
|
|
|
|
};
|
|
|
|
|