2019-09-04 17:01:23 +00:00
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From f56d4ecf8f2b666cf6fc166b1b9b30a9af650d00 Mon Sep 17 00:00:00 2001
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2019-07-09 18:32:28 +00:00
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From: Eric Anholt <eric@anholt.net>
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Date: Tue, 16 Oct 2018 10:13:41 -0700
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2019-09-04 17:01:23 +00:00
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Subject: [PATCH 577/782] drm/v3d: Don't try to set OVRTMUOUT on V3D 4.x.
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2019-07-09 18:32:28 +00:00
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The old field is gone and the register now has a different field,
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QRMAXCNT for how many TMU requests get serviced before thread switch.
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We were accidentally reducing it from its default of 0x3 (4 requests)
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to 0x0 (1).
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v2: Skip setting the reg at all on 4.x, instead of trying to update
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only the old field.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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---
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drivers/gpu/drm/v3d/v3d_gem.c | 3 ++-
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drivers/gpu/drm/v3d/v3d_regs.h | 2 ++
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2 files changed, 4 insertions(+), 1 deletion(-)
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--- a/drivers/gpu/drm/v3d/v3d_gem.c
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+++ b/drivers/gpu/drm/v3d/v3d_gem.c
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@@ -25,7 +25,8 @@ v3d_init_core(struct v3d_dev *v3d, int c
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* type. If you want the default behavior, you can still put
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* "2" in the indirect texture state's output_type field.
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*/
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- V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
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+ if (v3d->ver < 40)
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+ V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
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/* Whenever we flush the L2T cache, we always want to flush
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* the whole thing.
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--- a/drivers/gpu/drm/v3d/v3d_regs.h
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+++ b/drivers/gpu/drm/v3d/v3d_regs.h
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@@ -216,6 +216,8 @@
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# define V3D_IDENT2_BCG_INT BIT(28)
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#define V3D_CTL_MISCCFG 0x00018
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+# define V3D_CTL_MISCCFG_QRMAXCNT_MASK V3D_MASK(3, 1)
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+# define V3D_CTL_MISCCFG_QRMAXCNT_SHIFT 1
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# define V3D_MISCCFG_OVRTMUOUT BIT(0)
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#define V3D_CTL_L2CACTL 0x00020
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