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69 lines
2.0 KiB
Diff
69 lines
2.0 KiB
Diff
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From ffb05357b47f06b2b4d1e14ba89169e28feb727b Mon Sep 17 00:00:00 2001
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From: Sam Shih <sam.shih@mediatek.com>
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Date: Sun, 6 Nov 2022 09:50:27 +0100
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Subject: [PATCH 03/19] arm64: dts: mt7986: add crypto related device nodes
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This patch adds crypto engine support for MT7986.
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Signed-off-by: Vic Wu <vic.wu@mediatek.com>
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Signed-off-by: Sam Shih <sam.shih@mediatek.com>
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Link: https://lore.kernel.org/r/20221106085034.12582-5-linux@fw-web.de
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Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 4 ++++
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arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++++++++++++++
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arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 4 ++++
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3 files changed, 23 insertions(+)
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--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
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@@ -25,6 +25,10 @@
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};
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};
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+&crypto {
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+ status = "okay";
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+};
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+
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ð {
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status = "okay";
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--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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@@ -223,6 +223,21 @@
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status = "disabled";
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};
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+ crypto: crypto@10320000 {
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+ compatible = "inside-secure,safexcel-eip97";
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+ reg = <0 0x10320000 0 0x40000>;
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+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "ring0", "ring1", "ring2", "ring3";
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+ clocks = <&infracfg CLK_INFRA_EIP97_CK>;
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+ clock-names = "infra_eip97_ck";
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+ assigned-clocks = <&topckgen CLK_TOP_EIP_B_SEL>;
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+ assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>;
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+ status = "disabled";
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+ };
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+
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uart0: serial@11002000 {
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compatible = "mediatek,mt7986-uart",
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"mediatek,mt6577-uart";
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--- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
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@@ -25,6 +25,10 @@
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};
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};
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+&crypto {
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+ status = "okay";
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+};
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+
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ð {
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status = "okay";
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