2022-09-15 14:09:28 +00:00
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From 9fd5a49f6da9de5da83f4a53eccefad647ab15ed Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Mon, 11 Oct 2021 14:27:18 +0300
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Subject: [PATCH 246/247] clk: at91: sama7g5: set low limit for mck0 at 32KHz
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MCK0 could go as low as 32KHz. Set this limit.
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Link: https://lore.kernel.org/r/20211011112719.3951784-15-claudiu.beznea@microchip.com
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Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/at91/sama7g5.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/clk/at91/sama7g5.c
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+++ b/drivers/clk/at91/sama7g5.c
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2022-09-15 14:37:27 +00:00
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@@ -849,7 +849,7 @@ static const struct {
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2022-09-15 14:09:28 +00:00
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/* MCK0 characteristics. */
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static const struct clk_master_characteristics mck0_characteristics = {
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- .output = { .min = 50000000, .max = 200000000 },
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+ .output = { .min = 32768, .max = 200000000 },
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.divisors = { 1, 2, 4, 3, 5 },
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.have_div3_pres = 1,
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};
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