mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 16:31:13 +00:00
66 lines
3.4 KiB
Diff
66 lines
3.4 KiB
Diff
|
From patchwork Fri Nov 1 03:19:39 2024
|
||
|
|
Content-Type: text/plain; charset="utf-8"
|
||
|
|
MIME-Version: 1.0
|
||
|
|
Content-Transfer-Encoding: 7bit
|
||
|
|
X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
|
||
|
|
X-Patchwork-Id: 13858671
|
||
|
|
Return-Path:
|
||
|
|
<linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org>
|
||
|
|
Date: Fri, 1 Nov 2024 03:19:39 +0000
|
||
|
|
From: Daniel Golle <daniel@makrotopia.org>
|
||
|
|
To: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org,
|
||
|
|
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Uwe
|
||
|
|
=?iso-8859-1?q?Kleine-K=F6nig?= <u.kleine-koenig@baylibre.com>,
|
||
|
|
Sam Shih <sam.shih@mediatek.com>, Frank Wunderlich <frank-w@public-files.de>,
|
||
|
|
Daniel Golle <daniel@makrotopia.org>,
|
||
|
|
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,
|
||
|
|
Matthias Brugger <matthias.bgg@gmail.com>, Stephen Boyd <sboyd@kernel.org>,
|
||
|
|
Michael Turquette <mturquette@baylibre.com>
|
||
|
|
Subject: [PATCH] clk: mediatek: mt7988-infracfg: SPI0 clocks are not critical
|
||
|
|
Message-ID: <ZyRIy22aS_Yjoavg@pidgin.makrotopia.org>
|
||
|
|
MIME-Version: 1.0
|
||
|
|
Content-Disposition: inline
|
||
|
|
X-BeenThere: linux-mediatek@lists.infradead.org
|
||
|
|
X-Mailman-Version: 2.1.34
|
||
|
|
Precedence: list
|
||
|
|
List-Id: <linux-mediatek.lists.infradead.org>
|
||
|
|
List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-mediatek>,
|
||
|
|
<mailto:linux-mediatek-request@lists.infradead.org?subject=unsubscribe>
|
||
|
|
List-Archive: <http://lists.infradead.org/pipermail/linux-mediatek/>
|
||
|
|
List-Post: <mailto:linux-mediatek@lists.infradead.org>
|
||
|
|
List-Help: <mailto:linux-mediatek-request@lists.infradead.org?subject=help>
|
||
|
|
List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mediatek>,
|
||
|
|
<mailto:linux-mediatek-request@lists.infradead.org?subject=subscribe>
|
||
|
|
Sender: "Linux-mediatek" <linux-mediatek-bounces@lists.infradead.org>
|
||
|
|
Errors-To:
|
||
|
|
linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org
|
||
|
|
|
||
|
|
SPI0 clocks have wrongly been marked as critical while, probably due
|
||
|
|
to the SPI driver not requesting them. This can (and should) be addressed
|
||
|
|
in device tree instead.
|
||
|
|
Remove CLK_IS_CRITICAL flag from clocks related to SPI0.
|
||
|
|
|
||
|
|
Fixes: 4b4719437d85 ("clk: mediatek: add drivers for MT7988 SoC")
|
||
|
|
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
||
|
|
---
|
||
|
|
drivers/clk/mediatek/clk-mt7988-infracfg.c | 6 ++----
|
||
|
|
1 file changed, 2 insertions(+), 4 deletions(-)
|
||
|
|
|
||
|
|
--- a/drivers/clk/mediatek/clk-mt7988-infracfg.c
|
||
|
|
+++ b/drivers/clk/mediatek/clk-mt7988-infracfg.c
|
||
|
|
@@ -196,12 +196,10 @@ static const struct mtk_gate infra_clks[
|
||
|
|
GATE_INFRA2(CLK_INFRA_SPINFI, "infra_f_fspinfi", "spinfi_sel", 10),
|
||
|
|
GATE_INFRA2_FLAGS(CLK_INFRA_66M_NFI_HCK, "infra_hf_66m_nfi_hck", "sysaxi_sel", 11,
|
||
|
|
CLK_IS_CRITICAL),
|
||
|
|
- GATE_INFRA2_FLAGS(CLK_INFRA_104M_SPI0, "infra_hf_104m_spi0", "infra_mux_spi0_sel", 12,
|
||
|
|
- CLK_IS_CRITICAL),
|
||
|
|
+ GATE_INFRA2(CLK_INFRA_104M_SPI0, "infra_hf_104m_spi0", "infra_mux_spi0_sel", 12),
|
||
|
|
GATE_INFRA2(CLK_INFRA_104M_SPI1, "infra_hf_104m_spi1", "infra_mux_spi1_sel", 13),
|
||
|
|
GATE_INFRA2(CLK_INFRA_104M_SPI2_BCK, "infra_hf_104m_spi2_bck", "infra_mux_spi2_sel", 14),
|
||
|
|
- GATE_INFRA2_FLAGS(CLK_INFRA_66M_SPI0_HCK, "infra_hf_66m_spi0_hck", "sysaxi_sel", 15,
|
||
|
|
- CLK_IS_CRITICAL),
|
||
|
|
+ GATE_INFRA2(CLK_INFRA_66M_SPI0_HCK, "infra_hf_66m_spi0_hck", "sysaxi_sel", 15),
|
||
|
|
GATE_INFRA2(CLK_INFRA_66M_SPI1_HCK, "infra_hf_66m_spi1_hck", "sysaxi_sel", 16),
|
||
|
|
GATE_INFRA2(CLK_INFRA_66M_SPI2_HCK, "infra_hf_66m_spi2_hck", "sysaxi_sel", 17),
|
||
|
|
GATE_INFRA2(CLK_INFRA_66M_FLASHIF_AXI, "infra_hf_66m_flashif_axi", "sysaxi_sel", 18),
|