mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 10:08:59 +00:00
29 lines
989 B
Diff
29 lines
989 B
Diff
|
From 57b588c950b7e04e0f22393ad439299ba4fda9c3 Mon Sep 17 00:00:00 2001
|
||
|
|
From: John Crispin <blogic@openwrt.org>
|
||
|
|
Date: Thu, 26 Nov 2015 11:00:09 +0100
|
||
|
|
Subject: [PATCH] pinctrl/lantiq: Fix GPIO Setup of GPIO Port3
|
||
|
|
|
||
|
|
Some special handling of GPIO Port 3 is needed because of
|
||
|
|
some hardware thingofabob.
|
||
|
|
|
||
|
|
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||
|
|
Signed-off-by: Martin Schiller <mschiller@tdt.de>
|
||
|
|
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||
|
|
---
|
||
|
|
drivers/pinctrl/pinctrl-xway.c | 4 ++++
|
||
|
|
1 file changed, 4 insertions(+)
|
||
|
|
|
||
|
|
--- a/drivers/pinctrl/pinctrl-xway.c
|
||
|
|
+++ b/drivers/pinctrl/pinctrl-xway.c
|
||
|
|
@@ -1570,6 +1570,10 @@ static int xway_gpio_dir_out(struct gpio
|
||
|
|
{
|
||
|
|
struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
|
||
|
|
|
||
|
|
+ if (PORT(pin) == PORT3)
|
||
|
|
+ gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin));
|
||
|
|
+ else
|
||
|
|
+ gpio_setbit(info->membase[0], GPIO_OD(pin), PORT_PIN(pin));
|
||
|
|
gpio_setbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin));
|
||
|
|
xway_gpio_set(chip, pin, val);
|
||
|
|
|