mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 17:18:59 +00:00
39 lines
1.3 KiB
Diff
39 lines
1.3 KiB
Diff
|
From 3a57291fa4ca7f7647d826f5b47082ef306d839f Mon Sep 17 00:00:00 2001
|
||
|
From: Sean Cross <xobs@kosagi.com>
|
||
|
Date: Thu, 26 Sep 2013 10:51:09 +0800
|
||
|
Subject: [PATCH] ARM: dts: imx6qdl: add pcie device node
|
||
|
|
||
|
Add pcie device node for imx6qdl.
|
||
|
|
||
|
Signed-off-by: Sean Cross <xobs@kosagi.com>
|
||
|
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
|
||
|
---
|
||
|
arch/arm/boot/dts/imx6qdl.dtsi | 16 ++++++++++++++++
|
||
|
1 file changed, 16 insertions(+)
|
||
|
|
||
|
--- a/arch/arm/boot/dts/imx6qdl.dtsi
|
||
|
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
|
||
|
@@ -108,6 +108,22 @@
|
||
|
cache-level = <2>;
|
||
|
};
|
||
|
|
||
|
+ pcie: pcie@0x01000000 {
|
||
|
+ compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
|
||
|
+ reg = <0x01ffc000 0x4000>; /* DBI */
|
||
|
+ #address-cells = <3>;
|
||
|
+ #size-cells = <2>;
|
||
|
+ device_type = "pci";
|
||
|
+ ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
|
||
|
+ 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
|
||
|
+ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
|
||
|
+ num-lanes = <1>;
|
||
|
+ interrupts = <0 123 0x04>;
|
||
|
+ clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
|
||
|
+ clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
|
||
|
+ status = "disabled";
|
||
|
+ };
|
||
|
+
|
||
|
pmu {
|
||
|
compatible = "arm,cortex-a9-pmu";
|
||
|
interrupts = <0 94 0x04>;
|