2023-12-18 03:12:38 +00:00
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From f40cf244c3feb4e1a442f8029b691add2c65b3ab Mon Sep 17 00:00:00 2001
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2023-09-01 22:18:18 +00:00
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From: Andre Przywara <andre.przywara@arm.com>
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2023-12-18 03:12:38 +00:00
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Date: Mon, 31 Oct 2022 11:13:56 +0000
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Subject: [PATCH] arm64: dts: allwinner: h616: Add USB nodes
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2023-09-01 22:18:18 +00:00
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Add the nodes for the MUSB and the four USB host controllers to the SoC
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.dtsi, along with the PHY node needed to bind all of them together.
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EHCI/OHCI and MUSB are compatible to previous SoCs, but the PHY requires
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some quirks (handled in the driver).
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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2023-12-18 03:12:38 +00:00
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Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Link: https://lore.kernel.org/r/20221031111358.3387297-6-andre.przywara@arm.com
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Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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2023-09-01 22:18:18 +00:00
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---
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.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 160 ++++++++++++++++++
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1 file changed, 160 insertions(+)
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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@@ -504,6 +504,166 @@
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};
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};
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+ usbotg: usb@5100000 {
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+ compatible = "allwinner,sun50i-h616-musb",
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+ "allwinner,sun8i-h3-musb";
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+ reg = <0x05100000 0x0400>;
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+ clocks = <&ccu CLK_BUS_OTG>;
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+ resets = <&ccu RST_BUS_OTG>;
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+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "mc";
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+ phys = <&usbphy 0>;
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+ phy-names = "usb";
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+ extcon = <&usbphy 0>;
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+ status = "disabled";
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+ };
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+
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+ usbphy: phy@5100400 {
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+ compatible = "allwinner,sun50i-h616-usb-phy";
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+ reg = <0x05100400 0x24>,
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+ <0x05101800 0x14>,
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+ <0x05200800 0x14>,
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+ <0x05310800 0x14>,
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+ <0x05311800 0x14>;
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+ reg-names = "phy_ctrl",
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+ "pmu0",
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+ "pmu1",
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+ "pmu2",
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+ "pmu3";
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+ clocks = <&ccu CLK_USB_PHY0>,
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+ <&ccu CLK_USB_PHY1>,
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+ <&ccu CLK_USB_PHY2>,
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+ <&ccu CLK_USB_PHY3>,
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+ <&ccu CLK_BUS_EHCI2>;
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+ clock-names = "usb0_phy",
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+ "usb1_phy",
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+ "usb2_phy",
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+ "usb3_phy",
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+ "pmu2_clk";
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+ resets = <&ccu RST_USB_PHY0>,
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+ <&ccu RST_USB_PHY1>,
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+ <&ccu RST_USB_PHY2>,
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+ <&ccu RST_USB_PHY3>;
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+ reset-names = "usb0_reset",
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+ "usb1_reset",
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+ "usb2_reset",
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+ "usb3_reset";
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+ status = "disabled";
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+ #phy-cells = <1>;
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+ };
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+
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+ ehci0: usb@5101000 {
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+ compatible = "allwinner,sun50i-h616-ehci",
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+ "generic-ehci";
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+ reg = <0x05101000 0x100>;
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+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI0>,
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+ <&ccu CLK_BUS_EHCI0>,
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+ <&ccu CLK_USB_OHCI0>;
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+ resets = <&ccu RST_BUS_OHCI0>,
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+ <&ccu RST_BUS_EHCI0>;
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+ phys = <&usbphy 0>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ ohci0: usb@5101400 {
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+ compatible = "allwinner,sun50i-h616-ohci",
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+ "generic-ohci";
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+ reg = <0x05101400 0x100>;
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+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI0>,
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+ <&ccu CLK_USB_OHCI0>;
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+ resets = <&ccu RST_BUS_OHCI0>;
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+ phys = <&usbphy 0>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ ehci1: usb@5200000 {
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+ compatible = "allwinner,sun50i-h616-ehci",
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+ "generic-ehci";
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+ reg = <0x05200000 0x100>;
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+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI1>,
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+ <&ccu CLK_BUS_EHCI1>,
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+ <&ccu CLK_USB_OHCI1>;
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+ resets = <&ccu RST_BUS_OHCI1>,
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+ <&ccu RST_BUS_EHCI1>;
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+ phys = <&usbphy 1>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ ohci1: usb@5200400 {
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+ compatible = "allwinner,sun50i-h616-ohci",
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+ "generic-ohci";
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+ reg = <0x05200400 0x100>;
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+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI1>,
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+ <&ccu CLK_USB_OHCI1>;
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+ resets = <&ccu RST_BUS_OHCI1>;
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+ phys = <&usbphy 1>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ ehci2: usb@5310000 {
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+ compatible = "allwinner,sun50i-h616-ehci",
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+ "generic-ehci";
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+ reg = <0x05310000 0x100>;
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+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI2>,
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+ <&ccu CLK_BUS_EHCI2>,
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+ <&ccu CLK_USB_OHCI2>;
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+ resets = <&ccu RST_BUS_OHCI2>,
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+ <&ccu RST_BUS_EHCI2>;
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+ phys = <&usbphy 2>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ ohci2: usb@5310400 {
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+ compatible = "allwinner,sun50i-h616-ohci",
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+ "generic-ohci";
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+ reg = <0x05310400 0x100>;
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+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI2>,
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+ <&ccu CLK_USB_OHCI2>;
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+ resets = <&ccu RST_BUS_OHCI2>;
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+ phys = <&usbphy 2>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ ehci3: usb@5311000 {
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+ compatible = "allwinner,sun50i-h616-ehci",
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+ "generic-ehci";
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+ reg = <0x05311000 0x100>;
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+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI3>,
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+ <&ccu CLK_BUS_EHCI3>,
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+ <&ccu CLK_USB_OHCI3>;
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+ resets = <&ccu RST_BUS_OHCI3>,
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+ <&ccu RST_BUS_EHCI3>;
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+ phys = <&usbphy 3>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ ohci3: usb@5311400 {
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+ compatible = "allwinner,sun50i-h616-ohci",
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+ "generic-ohci";
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+ reg = <0x05311400 0x100>;
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+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_OHCI3>,
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+ <&ccu CLK_USB_OHCI3>;
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+ resets = <&ccu RST_BUS_OHCI3>;
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+ phys = <&usbphy 3>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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rtc: rtc@7000000 {
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compatible = "allwinner,sun50i-h616-rtc";
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reg = <0x07000000 0x400>;
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